FPGA SVUVM Verificat....
FPGA SVUVM Verification Engineer
Posted on :
19-10-2023
Employer Active
1 Vacancy
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Job Description
Req ID : 2280298
Job Title: FPGA SV/UVM Verification Engineer
Location: (REMOTE) Need basis he needs to travel Cedar Rapids, Iowa
Fulltime
Job Description & Skill Requirement:
Roles and Responsibilities:
5+ Years of FPGA Requirement based Verification
Experience with System Verilog
Experience with Test Bench Creation, Test Bench Troubleshooting, Test Case development, Test Procedure Development, and result analysis
Experience with UVM
DO-254 Process knowledge is desired
Video/Image Processing Project Experience
Employment Type
Full Time
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