Best NanoTech

About the Role Best NanoTech is seeking a Senior Technical Recruiter Semiconductor Talent Acquisition to join our rapidly growing talent acquisition team. You will work directly with Indias leading semiconductor companies startups and technology firms to identify screen and place

About the Role Best NanoTech is seeking a Senior Technical Recruiter Semiconductor Talent Acquisition to join our rapidly growing talent acquisition team. You will work directly with Indias leading semiconductor companies startups and technology firms to identify screen and place

Senior Engineer Flip Chip Packaging Location: Dholera Gujarat Employment Type: Full-Time Industry: Semiconductor Manufacturing / Advanced Packaging Experience: 5 10 Years Role Overview The Senior Engineer Flip Chip Packaging will lead the development qualification and manuf

Senior Engineer Flip Chip Packaging Location: Dholera Gujarat Employment Type: Full-Time Industry: Semiconductor Manufacturing / Advanced Packaging Experience: 5 10 Years Role Overview The Senior Engineer Flip Chip Packaging will lead the development qualification and manuf

DFT Engineer (DFT Feature Verification) - 3 5 Years Location: Hyderabad India Work type: Full-time Role Overview We are looking for a DFT Engineer (3 5 years) to work on DFT feature verification at SoC/ASIC level. The role focuses on building and executing verification for DFT-r

DFT Engineer (DFT Feature Verification) - 3 5 Years Location: Hyderabad India Work type: Full-time Role Overview We are looking for a DFT Engineer (3 5 years) to work on DFT feature verification at SoC/ASIC level. The role focuses on building and executing verification for DFT-r

Lead Engineer Software Development (Viado Design Suite / FPGA EDA) Experience: 12 years Location: Hyderabad (On-site/Hybrid as per business need) Employment Type: Full-time Role Overview We are hiring a Lead Engineer to contribute to the Viado Design Suite software development tea

Lead Engineer Software Development (Viado Design Suite / FPGA EDA) Experience: 12 years Location: Hyderabad (On-site/Hybrid as per business need) Employment Type: Full-time Role Overview We are hiring a Lead Engineer to contribute to the Viado Design Suite software development tea

Lead / Senior Design Verification Engineer (SoC) 7 Years Location: Pune India Experience: 7 years (relevant SoC DV) Role Summary Own and drive SoC Design Verification for complex IP/subsystem/SoC programs. You will manage verification execution build scalable verification enviro

Lead / Senior Design Verification Engineer (SoC) 7 Years Location: Pune India Experience: 7 years (relevant SoC DV) Role Summary Own and drive SoC Design Verification for complex IP/subsystem/SoC programs. You will manage verification execution build scalable verification enviro

FPGA Design Senior Engineer Experience: 6 9 Years Location: Hyderabad Employment Type: Full-time Positions: 7 Availability: Immediate / Short Notice Role Overview We are looking for a Senior FPGA Design Engineer with strong digital design fundamentals and hands-on experience acr

FPGA Design Senior Engineer Experience: 6 9 Years Location: Hyderabad Employment Type: Full-time Positions: 7 Availability: Immediate / Short Notice Role Overview We are looking for a Senior FPGA Design Engineer with strong digital design fundamentals and hands-on experience acr

FPGA Design Engineer Experience: 4 6 Years Location: Hyderabad Employment Type: Full-time Availability: Immediate / Short Notice Role Overview We are seeking an FPGA Design Engineer with strong digital design fundamentals and hands-on experience in FPGA development verification and

FPGA Design Engineer Experience: 4 6 Years Location: Hyderabad Employment Type: Full-time Availability: Immediate / Short Notice Role Overview We are seeking an FPGA Design Engineer with strong digital design fundamentals and hands-on experience in FPGA development verification and

FPGA Design Lead Engineer Experience: 8 15 Years Location: Hyderabad Employment Type: Full-time Availability: Immediate / Short Notice Role Overview We are seeking an FPGA Design Lead Engineer with deep expertise in digital logic design and hands-on ownership of FPGA development

FPGA Design Lead Engineer Experience: 8 15 Years Location: Hyderabad Employment Type: Full-time Availability: Immediate / Short Notice Role Overview We are seeking an FPGA Design Lead Engineer with deep expertise in digital logic design and hands-on ownership of FPGA development

SoC Design Lead Engineer ASIC / SoC (ARM-Based Platforms) Experience: 10 15 Years Location: Bengaluru India Employment Type: Full-time Education B.E./ or M.E./ in Electronics Electrical Computer Engineering or a related field. Role Overview We are seeking an accomplished SoC Des

SoC Design Lead Engineer ASIC / SoC (ARM-Based Platforms) Experience: 10 15 Years Location: Bengaluru India Employment Type: Full-time Education B.E./ or M.E./ in Electronics Electrical Computer Engineering or a related field. Role Overview We are seeking an accomplished SoC Des

Senior Analog Layout Engineer (6-8 Years of Expereince) Bengaluru About the Role The Senior Analog Layout Engineer owns complex AMS and custom digital block layouts within the SoC flow delivering PV clean production ready designs in advanced CMOS. You will translate s

Senior Analog Layout Engineer (6-8 Years of Expereince) Bengaluru About the Role The Senior Analog Layout Engineer owns complex AMS and custom digital block layouts within the SoC flow delivering PV clean production ready designs in advanced CMOS. You will translate s

Analog Layout Engineer (4 6 years) Bengaluru About the role You will independently convert schematics into well structured device cell and block level analog/mixed signal layouts using Cadence Virtuoso working closely with senior layout and analog design engineers. You

Analog Layout Engineer (4 6 years) Bengaluru About the role You will independently convert schematics into well structured device cell and block level analog/mixed signal layouts using Cadence Virtuoso working closely with senior layout and analog design engineers. You

SoC Design Engineer Junior Level (ASIC / SoC) Experience: 3 5 Years Location: Bengaluru India Employment Type: Full-time Education B.E./ or M.E./ in Electronics Electrical Computer Engineering or a related discipline. Role Overview We are seeking a SoC Design Junior Engineer wit

SoC Design Engineer Junior Level (ASIC / SoC) Experience: 3 5 Years Location: Bengaluru India Employment Type: Full-time Education B.E./ or M.E./ in Electronics Electrical Computer Engineering or a related discipline. Role Overview We are seeking a SoC Design Junior Engineer wit

Lead Analog Layout Engineer (10 15 Years) Bengaluru About the Role We are seeking a Lead Analog Layout Engineer to spearhead the custom layout implementation for analog/mixed-signal (AMS) modules and custom-digital blocks within our SoC this role you will be responsible for

Lead Analog Layout Engineer (10 15 Years) Bengaluru About the Role We are seeking a Lead Analog Layout Engineer to spearhead the custom layout implementation for analog/mixed-signal (AMS) modules and custom-digital blocks within our SoC this role you will be responsible for

Job Summary We are looking for a skilled Design for Test (DFT) Lead Engineer with 4 6 years of hands-on experience in ASIC/SoC development. The ideal candidate will drive DFT architecture ATPG execution and test coverage improvement while collaborating closely with design physical i

Job Summary We are looking for a skilled Design for Test (DFT) Lead Engineer with 4 6 years of hands-on experience in ASIC/SoC development. The ideal candidate will drive DFT architecture ATPG execution and test coverage improvement while collaborating closely with design physical i

Job Title: SoC Design Engineer (ARM / RTL / Integration) Experience: 6 10 Years Location: Hyderabad / Bengaluru India Employment Type: Full-Time Domain: Semiconductor ASIC AI SoC Design About the Role We are looking for a highly motivated SoC Design Engineer with strong front-end

Job Title: SoC Design Engineer (ARM / RTL / Integration) Experience: 6 10 Years Location: Hyderabad / Bengaluru India Employment Type: Full-Time Domain: Semiconductor ASIC AI SoC Design About the Role We are looking for a highly motivated SoC Design Engineer with strong front-end

Job Overview We are looking for DFT-trained fresh graduates who are passionate about VLSI and semiconductor design. This role is ideal for candidates who have completed professional VLSI/DFT training from reputed institutes such as Maven or similar and are eager to begin their career

Job Overview We are looking for DFT-trained fresh graduates who are passionate about VLSI and semiconductor design. This role is ideal for candidates who have completed professional VLSI/DFT training from reputed institutes such as Maven or similar and are eager to begin their career

Job Overview We are hiring Physical Design (PD) trained fresh graduates who are passionate about VLSI and semiconductor design. This opportunity is ideal for candidates who have completed Physical Design training from reputed VLSI institutes and are eager to start their careers workin

Job Overview We are hiring Physical Design (PD) trained fresh graduates who are passionate about VLSI and semiconductor design. This opportunity is ideal for candidates who have completed Physical Design training from reputed VLSI institutes and are eager to start their careers workin

Job title: RN-Manager - Surgical Services Job Code: 1000 Location- Arlington TX 76000 Fulltime 12 Hrs Variable shift Rate: - $84843.2 - $127275.2/year with benefits Specialty: Manager - Surgical Services Shift start: 8 AM Shift End: 8 PM Shift per week: 3 Hours: 36 SignOn Bonus: $1500

Job title: RN-Manager - Surgical Services Job Code: 1000 Location- Arlington TX 76000 Fulltime 12 Hrs Variable shift Rate: - $84843.2 - $127275.2/year with benefits Specialty: Manager - Surgical Services Shift start: 8 AM Shift End: 8 PM Shift per week: 3 Hours: 36 SignOn Bonus: $1500

Job title: RN-Unit Manager Job ID: 4266 Location- Austin TX 73301 Fulltime 12 Hrs Days Rate: - $130k/year with benefits Specialty: Unit Manager Shift start: 7 AM Shift End: 7 PM Shift per week: 3 Hours: 36 Position Description PACU Manager Austin TX Schedule Full-time Day

Job title: RN-Unit Manager Job ID: 4266 Location- Austin TX 73301 Fulltime 12 Hrs Days Rate: - $130k/year with benefits Specialty: Unit Manager Shift start: 7 AM Shift End: 7 PM Shift per week: 3 Hours: 36 Position Description PACU Manager Austin TX Schedule Full-time Day

Job title: RN Director-Womens Services Job ID: 4524 Location- Austin TX 73301 Fulltime Day shift Rate: - $150k annually with benefits Specialty: Womens Services Shift start: 8 AM Shift End: 5 PM Shift per week: 5 Hours: 45 Position Description Director of Postpartum Austin TX Sched

Job title: RN Director-Womens Services Job ID: 4524 Location- Austin TX 73301 Fulltime Day shift Rate: - $150k annually with benefits Specialty: Womens Services Shift start: 8 AM Shift End: 5 PM Shift per week: 5 Hours: 45 Position Description Director of Postpartum Austin TX Sched