Senior IC Packaging Design Engineer

Location: Chandler Arizona OR Hillsboro Oregon (Onsite)

Employment: Long-Term Contract (12 Months)

Experience: 6 10 Years

We are looking for an experienced IC Packaging Design Engineer to develop advanced semiconductor package solutions for high-performance products. The role requires strong expertise in package layout substrate implementation SI/PI-aware design manufacturability and collaboration with package architects and system engineers.

• Develop complex IC package layouts for advanced semiconductor products.
• Design high-density substrates using Siemens Xpedition or Cadence APD.
• Perform package floorplanning and routing.
• Work closely with SI/PI engineers during package implementation.
• Optimize package performance for signal integrity and power delivery.
• Ensure compliance with manufacturing and reliability requirements.
• Support package architecture implementation.
• Review package design quality and design rule compliance.
• Resolve package layout issues.
• Support engineering change implementation.
• Mentor junior package designers.
• Participate in design reviews with global engineering teams.

• Bachelors or Masters degree in Electrical/Electronics Engineering.
• 6 10 years of IC Packaging Design experience.
• Strong experience with substrate layout and package implementation.
• Experience designing advanced semiconductor packages.

• Siemens Xpedition (XPD)
• Cadence APD
• Cadence Allegro
• Cadence SiP

• Advanced Package Design
• High Density Substrate Design
• Flip Chip Packaging
• Multi-layer Package Design
• Package Floorplanning

• Physical Package Layout
• Design Rule Compliance
• Manufacturing Constraints
• Yield Optimization

• Signal Integrity (SI)
• Power Integrity (PI)
• Reliability
• Design for Manufacturability (DFM)