Senior ESD Engineer NRIs Return to INDIA

• Conduct ESD/LUP research and experiments to investigate how to designin the best ESD and latchup design and layout solutions that minimize product defects due to electrostatic discharge (ESD) or latchup (LUP) events.
• Design ESD test structures to fully evaluate the high current and voltage properties of the ESD IO input or power clamps circuits.
• Assess the fundamental ESD properties of each type of ESD circuit elements from active diffusions to BEOL metal layers by wafer level transmission line pulse (TLP and vfTLP) measurements to develop onchip protection from ESD and or LUP events.
• Analyze ESD and latchup (LUP) test structure data and generate ESD/LUP design rules and Guidelines.
• Develop and expand the ESD and latchup circuit models based of the measured ESD data.
• Supervise and arrange fullchip ESD design review process (Schematic and Pathfinder analysis) for each design prior to tapeout.
• Apply Pathfinder type ESD current density and resistance verification tool to ensure full die layout meet all ESD design rule requirements.
• Lead and coordinate first silicon ESD and latchup design validation tests and perform root cause ESD and LUP analysis as vital to ensure that product meets Microns minimum qualification requirements.
• Continually improve product design and reliability by introducing innovative ESD designs.

Successful candidates for this position will have:

• A proven understanding of advanced semiconductor device physics including deep submicron CMOS devices.
• A good understanding of groundbreaking CMOS process technology and electrical circuit analysis.
• Experience in Cadence design tools for design layout and verification tools.
• Handson experience in ESD characterization analysis using wafer level transmission line pulse (TLP) test equipment.
• Experience waveform generators oscilloscopes source/measure units Agilent and/or Keithley parametric analyzers/testers and impedance analyzers.
• Familiarity with ESD analysis tools like PERC or PathFinder or similar software tools.
• Strong data analysis skills are required to extract the high current ESD properties and develop ESD/Latchup design rules for critical ESD circuits.
• Strong oral and written communication skills are required to provide ESD/LUP technical leadership with diverse worldwide teams in Design Product Engineering R&D characterization and Quality Assurance teams.