Silicon PCIe bringup and validation Engineer
Posted on :
21-03-2024
Employer Active
1 Vacancy
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Monthly Salary
Not Disclosed
Salary Not Disclosed
Vacancy
1 Vacancy
Posted on :
21-03-2024
Job Description
Req ID : 2651910
Silicon PCIe bringup and validation Engineer About The Job: The role of the Silicon PCIe Bringup and Validation Engineer involves the initiation and validation of the PCIe subsystems within Client SOC design. This position demands a comprehensive grasp of cuttingedge PCIe design tailored for server applications covering aspects such as physical design logic performance system and software. Responsibilities includes test generation configuring test infrastructure planning and executing bringup processes and developing and executing validation plans specifically for PCIe systems. Currently the intention is to fill technical lead or senior technical staff positions for this role. Responsibilities:
- As a lead you will lead an engineering team responsible for designing implementing and executing a PCIe subsystem silicon bringup plans including functional and performance tests to validate the subsystem for the silicon product to meet the product requirements.
- Collaborate with crossfunctional teams including design architecture firmware and software to ensure successful subsystem integration and validation.
- Work with vendors and partners to ensure successful subsystem bringup and validation including reviewing and providing feedback on vendor documentation and coordinating with vendor support teams.
- Debug and rootcause issues found during subsystem bringup and validation and work with crossfunctional teams to implement corrective actions.
- Drive continuous improvement of subsystem bringup and validation processes and methodologies including automation tool development and documentation.
- Maintain uptodate knowledge of the subsystem technology and industry trends.
- Indepth knowledge of system architecture performance/power and software of PCIe subsystem for server applications.
- Experienced level knowledge C/C and Python.
- Relevant knowledge of verification methodologies Verilog simulation waveform viewers and emulation.
- Experience in silicon debug for logic software and physical issues
- Strong ability to triage issues and develop environment and tools.
- Excellent skills in problem solving written and verbal communication excellent organization skills and highly selfmotivated.
- Ability to work well in a team and be productive under aggressive schedules.
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- PhD Masters Degree or Bachelors Degree with more than 5 years of experience in PCIe technical subject area.
Employment Type
Full Time
Company Industry
Key Skills
- Python
- SOC
- Debugging
- C/C++
- FDA Regulations
- Minitab
- Technical Writing
- GAMP
- OS Kernels
- Perl
- cGMP
- Manufacturing
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