Physical Design

Aloha Consulting Group

Job Location:

Ho Chi Minh City - Vietnam

Salary: Not Disclosed

Experience Required: 5-7years

Posted on: 23 hours ago

Vacancies: 1 Vacancy

Job Summary

ACG3440JOB

Our client is a technology company that is looking for a qualified candidate to join their firm.

Take ownership of the full physical design cycle from synthesis to GDSII tape-out.
Perform key physical design tasks including synthesis floorplanning placement clock tree synthesis (CTS) routing and timing analysis.
Execute sign-off checks such as Static Timing Analysis (STA) EM/IR analysis (IR drop Dynamic Voltage Drop P-EM S-EM) physical verification (LVS DRC ANT DFM) and low-power verification; support tape-out activities.
Ensure designs meet performance power and area (PPA) targets.
Utilize EDA tools for design implementation analysis and verification.
Collaborate closely with cross-functional teams including RTL design constraints DFT DV and IP teams to ensure alignment with design specifications.
Perform physical verification tasks such as Layout Versus Schematic (LVS) and Design Rule Checking (DRC).
Conduct parasitic extraction and analysis to optimize IC performance.
Identify and resolve design and flow issues; propose solutions and drive them to closure.
Optimize designs for power area and performance (PPA).
Stay updated with advanced technology nodes (7nm/5nm/3nm and beyond) industry standards and EDA methodologies.
Contribute to logic synthesis power planning clock distribution signal integrity and place-and-route optimization.
Work collaboratively with team members to resolve technical challenges and improve design flows.

Requirements

Minimum 5 years of experience in Physical Design.
Strong communication skills with the ability to work directly with customers clarify requirements and ensure high-quality deliverables.
Ability to identify issues propose solutions escalate when necessary and follow through until resolution.
Proactive mindset in knowledge sharing and continuous improvement within the team.
Strong debugging and analysis skills in areas such as timing congestion and sign-off checks.
Ability to handle multiple tasks effectively in a fast-paced environment.
Experience in customer reporting and stakeholder communication.
Leadership experience including mentoring and training junior engineers is a plus.
Strong problem-solving mindset with attention to detail; actively seek clarification rather than making assumptions.

Contact: Giau Nguyen

Due to the immense number of applications only shortlisted candidates will be contacted.

Required Skills:

Must-have Minimum 5 years of experience in senior leadership roles such as HR Director CHRO COO or equivalent in large-scale organizations (500 employees). Strong expertise in human resources management business administration or related fields. Good command of English (both written and spoken). Nice-to-have Strong leadership strategic thinking and analytical capabilities. Excellent communication and presentation skills with the ability to influence stakeholders. Familiarity with AI applications in HR management and operations. An international education background is a plus. Contact: Ha Hoang Due to the immense number of applications only shortlisted candidates will be contacted.

ACG3440JOBOur client is a technology company that is looking for a qualified candidate to join their firm.Take ownership of the full physical design cycle from synthesis to GDSII tape-out.Perform key physical design tasks including synthesis floorplanning placement clock tree synthesis (CTS) routing...

ACG3440JOB

Our client is a technology company that is looking for a qualified candidate to join their firm.

Take ownership of the full physical design cycle from synthesis to GDSII tape-out.
Perform key physical design tasks including synthesis floorplanning placement clock tree synthesis (CTS) routing and timing analysis.
Execute sign-off checks such as Static Timing Analysis (STA) EM/IR analysis (IR drop Dynamic Voltage Drop P-EM S-EM) physical verification (LVS DRC ANT DFM) and low-power verification; support tape-out activities.
Ensure designs meet performance power and area (PPA) targets.
Utilize EDA tools for design implementation analysis and verification.
Collaborate closely with cross-functional teams including RTL design constraints DFT DV and IP teams to ensure alignment with design specifications.
Perform physical verification tasks such as Layout Versus Schematic (LVS) and Design Rule Checking (DRC).
Conduct parasitic extraction and analysis to optimize IC performance.
Identify and resolve design and flow issues; propose solutions and drive them to closure.
Optimize designs for power area and performance (PPA).
Stay updated with advanced technology nodes (7nm/5nm/3nm and beyond) industry standards and EDA methodologies.
Contribute to logic synthesis power planning clock distribution signal integrity and place-and-route optimization.
Work collaboratively with team members to resolve technical challenges and improve design flows.

Requirements

Minimum 5 years of experience in Physical Design.
Strong communication skills with the ability to work directly with customers clarify requirements and ensure high-quality deliverables.
Ability to identify issues propose solutions escalate when necessary and follow through until resolution.
Proactive mindset in knowledge sharing and continuous improvement within the team.
Strong debugging and analysis skills in areas such as timing congestion and sign-off checks.
Ability to handle multiple tasks effectively in a fast-paced environment.
Experience in customer reporting and stakeholder communication.
Leadership experience including mentoring and training junior engineers is a plus.
Strong problem-solving mindset with attention to detail; actively seek clarification rather than making assumptions.