hiring Analog Mixed Signal Designers to work on design of building blocks used in highspeed IPs (e.g. DDR/LPDDR/HBM/UCIe/MIPI/PCIe)
Responsibilities:
- Derive circuit block level specifications from top level specifications
- Doing optimized transistorlevel design of analog and custom digital blocks
- Spice simulations to cover detailed specifications
- Guiding layout design for best performance matching power delivery
- Performance characterization of designs in PVT mismatch corners including reliability (aging EM IR) checks
- Generating/delivering behavioral (verilog) timing (lib) physical (LEF) models of circuits
- Conducting design reviews at different phases/maturity of the design
Qualifications:
- BE/MTech in Electrical & Electronics
- Good fundamentals in RLC circuits CMOS devices and circuits and with digital design building blocks (e.g. counters FSMs)
- Prior experience with custom design environments (e.g. Cadence Virtuoso Synopsis Custom Design Family) and spice simulators
- Collaborative and positive attitude
Experience:
- 0 to 4 years: Design Team Members
- 4 to 7 years: Technical Lead/Mentor
- 7 years: Team Lead/Manager
Example Designs:
- Wireline channel Transmitters (Tx) Receivers (Rx) Equalization circuits (FFE DFE CTLE)
- Serializer deserializer
- Bandgap reference low dropout (LDO) regulators
- PLL DLL Phase Interpolator
- Comparators DACs ADCs
Growth and Learning Opportunities:
- Close collaboration with experienced mentors
- Opportunity to work on advanced process technologies (e.g. 12nm 7nm 5nm 3nm 2nm)
- Fast paced growth for high performance individuals
If youre ready to take on this challenge and grow your career
or /toto learn more about this fantastic opportunity!
Required Experience:
Manager