Principal PHY SerDes Validation Engineer

About Marvell

Marvells semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise cloud and AI and carrier architectures our innovative technology is enabling new possibilities.

At Marvell you can affect the arc of individual lives lift the trajectory of entire industries and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation above and beyond fleeting trends Marvell is a place to thrive learn and lead.

Your Team Your Impact

What You Can Expect

• Complete responsibility for PCIe or Ethernet PHY validation in a post-silicon environment.

• Defining documenting executing and reporting the overall PHY validation/test plan for Marvell storage devices.

• Lab-based silicon bring-up and unit test execution focused on Physical and PCS layer hardware and firmware functionality while also extending to the protocol layer of the stack.

• Perform high-speed signal validation and analysis using various test equipment to measure Eye diagram / Jitter / BER.

• Analyze and debug issues on the PHY protocol of high-speed serial interfaces (PCIe or Ethernet).

• Troubleshoot failing tests with diagnostics software tools hardware analyzers oscilloscopes meters and logic/protocol analyzers.

• Lead collaborative technical discussions to drive resolution on technical issues.

• Work with cross-functional teams and external vendors to debug any post-silicon and/or customer issues related to PCIe or Ethernet PHY.

• Work closely with customers to address design issues and debug failure cases.

Note: We welcome candidates at various experience levels for this role. During the interview process candidates will be assessed for the appropriate level and offers will align with that level which may differ from the one in this posting.

What Were Looking For

• Bachelors degree in Computer Science Electrical Engineering or a related field and 10 years of related professional experience OR a Masters degree and/or PhD in Computer Science Electrical Engineering or a related field with 35 years of experience.

• Strong understanding of high-speed SERDES equalization techniques and PCIe or Ethernet protocols.

• 5 years of experience with High Speed IO testing debugging and validation.

• 5 years of direct experience in SERDES characterization/design.

• In-depth knowledge of SERDES interfaces using NRZ or PAM4 signaling for PCIe or Ethernet interfaces; knowledge of relevant Ethernet standards (e.g. 10GbE 100GbE 400GbE) is a plus.

• In-depth working knowledge of test equipment used for SERDES characterization (scope BERT network analyzer etc.).

• Deep understanding of high-speed electrical signaling principles differential signaling and mixed-signal designs.

• Experience in Python for automation framework development as well as mathematical programming such as MATLAB.

• Critical thinking a problem-solving attitude and ownership of the groups results.

• Knowledge of SERDES modeling techniques.

• Excellent verbal and written communication skills.

Expected Base Pay Range (USD)

The successful candidates starting base pay will be determined based on job-related skills experience qualifications work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race color religion sex national origin sexual orientation gender identity disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at .

Interview Integrity

To support fair and authentic hiring practices candidates are not permitted to use AI tools (such as transcription apps real-time answer generators like ChatGPT or Copilot or automated note-taking bots) during interviews.

These tools must not be used to record assist with or enhance responses in any way. Our interviews are designed to evaluate your individual experience thought process and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations including the Export Administration Regulations (EAR). As such applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens lawful permanent residents or protected individuals as defined by 8 U.S.C. 1324b(a)(3) all applicants may be subject to an export license review process prior to employment.