Circuit Design Engineer Library

Do you want to utilize your engineering background to make big things happen Can you influence connect get results and communicate effectively Can you deliver on a predictable and dynamic schedule Do you have a passion for crafting entirely new solutions Do you love building without precedent As part of our Digital Design Engineering group youll take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed bringing visionary ideas to the real world. Your efforts will be groundbreaking often literally. Join us and youll help design the tools that allow us to bring customers experiences theyve never before envisioned. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Circuit Design Engineering this highly visible role you will be at the heart of a processor design effort leading custom digital circuits team and library development making a critical impact delivering products to market quickly.

Imagine yourself at the center of our SOC design effort collaborating with all disciplines playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas as well as work with a team of talented engineers. As a Circuit Design Engineering Lead for the custom circuits team you will perform the following: nn- Drive development of high performance low power optimized standard cells to improve design PPA. n- Drive development of optimal level shifters retention designs etc that cater to todays Low Power Design Requirements. n- Identify next generation of new ideas to drive PPA improvements furthern- Engage with CPU SOC and GPU teams on chip level integration requirements. n- Drive Circuit QA checks u0026 analysis develop new methodologies based on new design requirements. n- Work with foundries on DRM complaint layout checkers and iPDK requirements. n- Plan u0026 drive development of designs like new circuits u0026 tech node enablement. n- Manage migration to new PDK PDV of standard cells u0026 releases.

Bachelors Degree minimum of 3 years of experience

We are looking for applicants with 3 years of experience in Standard cells circuit experience in developing driving u0026 implementing circuit methodologiesnProven experience leading u0026 mentoring a small teamnStrong influence excellent interpersonal skills u0026 able to work with multi-functional teamsnKnowledge of standard cell layout DRM DRC/LVS decks PDV flows experience in advanced tech node device behavior with understanding of layout experience in flop complex Standard Cells design u0026 Power Management of circuit robustness analysisnExperience in scripting in Perl and/or TCL.