2023 Engineering Internship Physical Design Group

Early Careers at Arm
Do you want to help Arm and its partners to build outstanding products?

Arms Sophia Antipolis design centre is located in one of the most appealing parts of France, the French Riviera, at the heart of Europes largest and most dynamic technology park. Surrounded by mountains and the Mediterranean Sea, our outstanding design centre has delivered leading products from Arms Cortex (TM) CPU family. These CPUs power some of the worlds best-selling smartphones, tablets and gaming systems, using technology that has taken user experience and performance to another level!

We aim to help you increase your potential by taking part in the development of the next generation of CPUs that will appear in the most desirable products over the next 3 years and give you an incredible variety of potential career paths. Our CPU hardware design team is a good combination of very expert engineers and some of the most enthusiastic and hardworking graduates, coming from the best engineering schools. Collectively, we are highly creative, collaborative, delivery-orientated and committed.Job Description
Arms Physical Design Group designs and validates IP that allows to get the best physical implementation possible of Arm cores, spanning multiple technology nodes up to the most advanced ones. Our projects range from improving existing hardware, creating new hardware or designing new methodologies to investigate physical, electrical or thermal characteristics. In each case, we provide you with the most exciting and enriching topics that could end up in a real project!

Our main focus is to conceive, build and validate memories, standard cells and analog blocks to be used by Arm cores, meeting our partners needs in terms of Area, Frequency, Power and Performance. Moreover, due to the increased transistor scaling, other aspects have become crucial in the design of a microprocessor and are deeply investigated to tackle the challenges they pose, such as thermal effects, electro migration and IR drop.

Given the multidisciplinary approach required by physical design, each internship we offer may involve a different set of skills, be it physical layout, transistor level simulation, schematic level design and testing, and more, often by taking advantage of scripting languages such as Perl, Tcl or Python for automation, and by deepening your knowledge and understanding of the process node being employed. We will support you with continuous learning and development to assist you in achieving your professional goals.Responsibilities
With the increasing current budget required by multi core processors, traditional strategies are no longer sufficient to keep the IR drop issue at bay. Metal Insulator Metal capacitances, or MIMCAP, came to the aid of processor designers, as they are capable of constitutingefficient decoupling capacitors without adding any area penalty. However, they add an additional complexity: they must be designed properly according to the targeted floorplan and technology node, adding a considerable overhead to the engineering costs of a CPU. The goal of this internship is to lay the groundwork to develop a MIMCAP compiler, a tool capable of automatically generating MIMCAP tiles for any given technology node and target (link removed) this internship you will:
Analyse how the physical layout of a MIMCAP tile affects its Effective Series Capacitance (ESC), its Effective Series Resistance (ESR) and its frequency response.
Understand how to optimize each MIMCAP tile to improve its capacitance and frequency response, given the chosen floorplan and technology.
Design automatic layout generation algorithms to automatise the layout optimization of MIMCAP tiles and generate all required model views for selected tiles.
Run a prototypal automatic generation of MIMCAP tiles for a test Arm core and analyse their effectiveness in dampening the IR drop.
We will help you to become familiar with the subject, think about possible implementations and design the most promising one. One of our brilliant engineers will mentor you during your journey and you will share your findings during regular presentations and a final report.Required Skills and Experience
Students in their last year of Masters (BAC+5 or equivalent) and available for a 5 to 6-month internship.
Students in electronic engineering or another relevant field, but other degrees may also be considered based on experience.
A passion for new technologies, design challenges posed by advanced technology nodes and innovation.
A good knowledge of microelectronics and circuit theory.
Hands-on experience of physical layout using EDA tools such as Cadence Virtuoso.
Fluency in EnglishNice To Have Skills and Experience
Familiarity with IR drop and frequency response.
Good coding skills using a scripting language such as bash, Perl, Python and/or TCL.
Use of UNIX and shell programming.
Familiarity with a versioning environment such as git.
Ability to express ideas and communicate effectively.
Good interpersonal (link removed) Return
Package
Salary 1750 euros / month
Lunch vouchers
1 day off (authorized leave) / month
Transportation 50% reimbursement
Mobility subsidy if eligible
Work Council subsidy /meyclubInternship duration
5 to 6 months#LI-NB1