ASICRTL Design Engineer Senior
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Job Location:
San Jose, CA - USA
Monthly Salary:
Not Disclosed
Posted on:
2 hours ago
Vacancies:
1 Vacancy
Job Summary
Overview:
TekWissen is a global workforce management provider headquartered in Ann Arbor Michigan that offers strategic talent solutions to our clients worldwide. This Client is an American multinational semiconductor company based in Santa Clara California that develops computer processors and related technologies for business and consumer markets. Global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories graphics processors motherboard chip sets and a variety of components used in consumer electronics goods.
Job Title: ASIC/RTL Design Engineer - Senior
Work Location: San Jose CA
Duration: 12 Months
Work Type: Temporary Assignment
Job Type: Onsite
Job Description:
KEY RESPONSIBILITIES:
- Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional timing area and power requirements.
- Collaborate with architecture and hardware teams to understand the requirements.
- Work with verification and physical design teams to achieve high quality design and successful tape out.
- Design and implement logic functions that enable efficient test and debug.
- Participate in silicon bring-up for features owned.
- Contribute in cross-functional teams to solve novel problems across multiple functional areas in development of required features.
- Implement automation to increase design team efficiency.
EXPERIENCE:
Required:
Required:
- 5-6 years experience required
- Must have proven track record of ASIC design on several production tape-outs.
- Experience in Designing RTL block for an SOC.
- Experience in integrating ASIC IP into an SOC.
- Experience with synthesis static timing analysis & optimizations.
Top MUST HAVE skills:
- Experience in Designing RTL block for an SOC.
- Must have proven track record of ASIC design on several production tape-outs.
- Experience with Lint CDC RDC.
Nice-to-have:
- Experience writing timing constraints and exceptions.
- Experience with automation using scripting techniques such as PERL Python or Tcl
- Experience in Power-saving techniques.
- Experience with Arm architecture and APB AXI CHI protocols.
- Experience with design involving Interconnects.
- Ability to develop clear and concise engineering documentation.
- Ability to organize and present complex technical information.
- Strong verbal and written communication skills
EDUCATION:
- Bachelors degree required
TekWissen Group is an equal opportunity employer supporting workforce diversity.
Key Skills
- Aerospace Engineering
- Anti Money Laundering
- Electrical Installation
- Desktop Support
- Corporate Marketing
- Fabrication
