Package Design Engineer

San Jose, CA - USA

Monthly Salary: Not Disclosed

Posted on: 30+ days ago

Vacancies: 1 Vacancy

Job Summary

Requirements/Skills:

Possess Mentor Graphics Cadence PLA knowledge
Multiple layers package design (8) experience
Understanding of substrate manufacturing design rule and assembly rule
Possess Flip Chip Package Design Concept
Good communication skill.
May require vendor on-site support

Requirements/Skills: Possess Mentor Graphics Cadence PLA knowledge Multiple layers package design (8) experience Understanding of substrate manufacturing design rule and assembly rule Possess Flip Chip Package Design Concept Good communication skill. May require vendor on-site ...