Exp: 5 Years
Job Description:
- Extensive experience in IP/SOCVerification.
- Proficiency in System Verilog and UVM.
- Handson experience in verifying IP protocols such as PCIe DDR USB Ethernet CXL HDMI MIPI DSI CS GLS CPUVerification or other highspeed protocols.
- Familiarity with scripting languages like Python Perl TCL etc.
- Experience in assembly language or C is a plus.
- Ability to develop testbenches from scratch and take ownership of the entireverificationprocess including subsystem/chiplevel coverage.
- Strong debugging skills.
Key Responsibilities:
- Develop testbench components (Driver Monitor Scoreboard) from scratch or enhance existing ones for IP Subsystem or SOCverification.
- Understanddesignspecifications to define theverificationstrategy.
- Create testbench microarchitecture test plans and coverage plan documents.
- Defineverificationscope develop test plans tests andverificationinfrastructure to ensuredesigncorrectness.
- Implement SystemVerilog assertions and functional coverage.
- Analyze code coverage and address missing scenarios to meet coverage goals.
- Collaborate withverificationteam members to develop execute and analyze test cases and sequences.
- Work closely with architects designers and pre and postsiliconverificationteams to meet deadlines.
- Coordinate with customer leads ensuring all deliverables and timelines are met.
- Serve as the projects point of contact responsible forverificationsignoff.
If you or someone in your network is interested please apply here or directly reach me on
Looking forward to your response.