SOC Jobs in Shanghai

We are looking for candidates with a broad set of skills and interests especially in the SOC IO area. Candidates must have a strong curiosity and problem-solving mindset for technological innovations and challenges. Candidates will play a critical part in system validation optimizatio More...

Responsibilities:Work with the globaldesign team to do complex SOC verification for digital/analog design.Responsible for verification plan quality verification result/design target cross-check test case development to have better coverage and verification quality.Co-work with functio More...

ResponsibilitiesWork on SOC Front-end design team be responsible for the SOC subsystem design including subsystem integration RTL coding design rule check and constrain delivery.Requirements:Strong Verilog and C coding skillsKnowledge of on-chip bus protocols: AMBA AXI or similar is a More...

ResponsibilitiesWork on SOC Front-end design team be responsible for the SOC subsystem design including subsystem integration RTL coding design rule check and constrain delivery.Requirements:Strong Verilog and C coding skillsKnowledge of on-chip bus protocols: AMBA AXI or similar is a More...

- Lead SoC validation process in factory by collaborating with multi-functional system and silicon teams to define the test coverage and bring up hardware/software testing environment.- Drive SoC defect failure analysis and upstream coverage improvement hands-on involvement in SoC b More...

Drive system-level optimization of SoC power thermal and performance to push the boundaries of iPhone -on involvement in SoC silicon bring-up debugging testing and validation at the system and development of diagnostic SW to exercise SoC functionality and performance at system with More...

Responsibilities:Participate in DFT feature and architecture definition for complex SOCImplement DFT logic/circuit including SCAN Boundary SCAN MBIST Analog Macro test logicGenerate DFT related timing constraints and support timing closure with backend engineerDFT test patterns genera More...

Responsibilities:Participate in DFT feature and architecture definition for complex SOCImplement DFT logic/circuit including SCAN Boundary SCAN MBIST Analog Macro test logicGenerate DFT related timing constraints and support timing closure with backend engineerDFT test patterns genera More...

At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.Key Responsibilities:Execute System-Level Verification: Develop and run test plans for ARM-based SoCs using UVM methodology focusing on subsystem and SoC-level interactions. Per More...

What you do at AMD changes everythingWe care deeply about transforming lives with AMD technology to enrich our industry our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center More...