Design Verification Engineer

American IT Systems

Job Location:

San Jose, CA - USA

Monthly Salary: Not Disclosed

Posted on: 16 days ago

Vacancies: 1 Vacancy

Job Summary

Job Description:

We are seeking DV engineers to verify complex internal IP blocks such as compute engines accelerators and custom logic within SoC environments.

Key Responsibilities:

Develop and maintain UVM-based verification environments
Create test plans testcases and coverage models
Perform functional verification of RTL designs
Debug RTL and testbench issues
Drive coverage closure (functional code)

Required Skills:

Strong hands-on with SystemVerilog and UVM
Experience in block-level verification
Good understanding of digital design fundamentals
Experience with debug tools (Verdi DVE etc.)

Good to Have:

Exposure to low-power verification (UPF)

Experience with AMBA protocols (AXI/AHB/APB)

Job Description: We are seeking DV engineers to verify complex internal IP blocks such as compute engines accelerators and custom logic within SoC environments. Key Responsibilities: Develop and maintain UVM-based verification environments Create test plans testcases and coverage models Perform fun...