NXP Semiconductors

Job SummaryNXP Semiconductors is seeking a Physical Design Engineer (G2) with strong fundamentals in digital implementation to join our growing VLSI this role you will contribute to the implementation and signoff of complex SoC/IP blocks in advanced technology nodes ensuring high-qua

Job SummaryNXP Semiconductors is seeking a Physical Design Engineer (G2) with strong fundamentals in digital implementation to join our growing VLSI this role you will contribute to the implementation and signoff of complex SoC/IP blocks in advanced technology nodes ensuring high-qua

Ready to join the future of innovation in Crypto & Security at NXPBecome part of a highly talented team and dynamic team that develops and tests state-of-the art secure cryptographic libraries protected against physical and logical attacks which have applications across all different

Ready to join the future of innovation in Crypto & Security at NXPBecome part of a highly talented team and dynamic team that develops and tests state-of-the art secure cryptographic libraries protected against physical and logical attacks which have applications across all different

NXPs MCU/MPU Engineering (MME) team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for NXPs Automotive Secure Edge Advanced Analog and Radar Processing business lines. MMEs. The team is challenged to produce industry-leading so

NXPs MCU/MPU Engineering (MME) team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for NXPs Automotive Secure Edge Advanced Analog and Radar Processing business lines. MMEs. The team is challenged to produce industry-leading so

Generic Job Description (not Job Level specific): The Design Methodologies and Tools Engineer / Architect develops and applies Computer Aided Design (CAD) software engineering methods theories and research techniques in the investigation and solution of technical problems. Assesses ar

Generic Job Description (not Job Level specific): The Design Methodologies and Tools Engineer / Architect develops and applies Computer Aided Design (CAD) software engineering methods theories and research techniques in the investigation and solution of technical problems. Assesses ar

Job Responsibilities:Validation Planning & StrategyDefinevalidation plansfor MCU/MPU subsystems (CPU memory peripherals interconnects).Developtest cases and coverage metricsbased on architecture and design specs.Identify corner cases stress scenarios and system-level use cases.Silicon

Job Responsibilities:Validation Planning & StrategyDefinevalidation plansfor MCU/MPU subsystems (CPU memory peripherals interconnects).Developtest cases and coverage metricsbased on architecture and design specs.Identify corner cases stress scenarios and system-level use cases.Silicon

Generic Job Description (not Job Level specific): The Systems Validation Engineer / Architect is responsible for comprehensive validation of key product indicators (KPIs) as defined in the system compliance matrix and product mission profiles.Your responsibilities:Lead postsilicon val

Generic Job Description (not Job Level specific): The Systems Validation Engineer / Architect is responsible for comprehensive validation of key product indicators (KPIs) as defined in the system compliance matrix and product mission profiles.Your responsibilities:Lead postsilicon val

Job responsibilities:Lead postsilicon validation efforts and collaborate with architects and design teams to develop comprehensive IP and SoClevel test plans.Own the architecture development and delivery of the RTOSbased SDK (FreeRTOS and others) including BSPs HALs lowlevel drivers a

Job responsibilities:Lead postsilicon validation efforts and collaborate with architects and design teams to develop comprehensive IP and SoClevel test plans.Own the architecture development and delivery of the RTOSbased SDK (FreeRTOS and others) including BSPs HALs lowlevel drivers a

Business Line Description:Advanced Chip Engineering Digital IP team defines and develops components for a wide range of products including automotive microprocessors application processors micro-controllers and networking. The Munich Digital IP team develops interface components DSP s

Business Line Description:Advanced Chip Engineering Digital IP team defines and develops components for a wide range of products including automotive microprocessors application processors micro-controllers and networking. The Munich Digital IP team develops interface components DSP s

About the RoleThis position is within the MME MCU/MPU Digital IP team. We develop best-in-class digital IPs for NXPs automotive and advanced microcontroller businesses delivering sensor and processing technologies that enable secure connected vehicles today and autonomous vehicles of

About the RoleThis position is within the MME MCU/MPU Digital IP team. We develop best-in-class digital IPs for NXPs automotive and advanced microcontroller businesses delivering sensor and processing technologies that enable secure connected vehicles today and autonomous vehicles of

Job Summary:This role has a primary objective to contribute to a new E/E architecture organization at NXP. The objective of the E/E architecture team is to build expertise at system level within NXP and to engage with the OEM advanced engineering team to offer support on sub-systems w

Job Summary:This role has a primary objective to contribute to a new E/E architecture organization at NXP. The objective of the E/E architecture team is to build expertise at system level within NXP and to engage with the OEM advanced engineering team to offer support on sub-systems w

Business Line Description:Advanced Chip Engineering Digital IP team defines and develops components for a wide range of products including automotive microprocessors application processors micro-controllers and networking. The Munich Digital IP team develops interface components DSP s

Business Line Description:Advanced Chip Engineering Digital IP team defines and develops components for a wide range of products including automotive microprocessors application processors micro-controllers and networking. The Munich Digital IP team develops interface components DSP s

We are seeking a highly skilled and motivated BT/BLE RF Validation Engineer to validate and characterize Bluetooth and Bluetooth Low Energy (BLE) radio performance for next-generation connectivity SoCs. The role involves end-to-end RF validation including test development automation d

We are seeking a highly skilled and motivated BT/BLE RF Validation Engineer to validate and characterize Bluetooth and Bluetooth Low Energy (BLE) radio performance for next-generation connectivity SoCs. The role involves end-to-end RF validation including test development automation d

Ready to join the future of innovation at NXPNXP Semiconductors enables secure connections and infrastructure for a smarter world advancing solutions that make lives easier better and safer. As the world leader in secure connectivity solutions for embedded applications we are driving

Ready to join the future of innovation at NXPNXP Semiconductors enables secure connections and infrastructure for a smarter world advancing solutions that make lives easier better and safer. As the world leader in secure connectivity solutions for embedded applications we are driving

Business Line DescriptionThe MCU/MPU Engineering Digital IP team defines and develops components for a wide range of products including automotive microprocessors application processors microcontrollers and networking Munich Digital IP team focuses on the development of interface com

Business Line DescriptionThe MCU/MPU Engineering Digital IP team defines and develops components for a wide range of products including automotive microprocessors application processors microcontrollers and networking Munich Digital IP team focuses on the development of interface com

Responsibilities:Develop and optimize Embedded MLinference engines for microcontrollers.Train and fine-tune machine learning models using LLM TensorFlow and/or PyTorch to be deployed on resource-constrained devices.Implement and experiment with techniques to improve model performance

Responsibilities:Develop and optimize Embedded MLinference engines for microcontrollers.Train and fine-tune machine learning models using LLM TensorFlow and/or PyTorch to be deployed on resource-constrained devices.Implement and experiment with techniques to improve model performance

Business Line Description Be an integral member of a highly-experienced team in R&D that is responsible for developing IP (Intellectual Property) used in the design of advanced microcontrollers and microprocessors. The IP for which this team is responsible enables a product portfolio

Business Line Description Be an integral member of a highly-experienced team in R&D that is responsible for developing IP (Intellectual Property) used in the design of advanced microcontrollers and microprocessors. The IP for which this team is responsible enables a product portfolio

Software Engineer Hardware Design Verification Location: This position is located in Ottawa and offers a hybrid work schedule with 3 days in office and 2 days work from home each week. A fully remote option is not available. Business Line DescriptionBe an integral member of a highly-

Software Engineer Hardware Design Verification Location: This position is located in Ottawa and offers a hybrid work schedule with 3 days in office and 2 days work from home each week. A fully remote option is not available. Business Line DescriptionBe an integral member of a highly-

Job Summary:Troubleshoot and repair all hardware and process failures for the following tool sets in a PVD Maintenance team: AMAT Endura AMAT CenturaPerform preventive maintenance activities following standardized work documents.Use SPC charts and FabGuard Fault Detection (FDC) softwa

Job Summary:Troubleshoot and repair all hardware and process failures for the following tool sets in a PVD Maintenance team: AMAT Endura AMAT CenturaPerform preventive maintenance activities following standardized work documents.Use SPC charts and FabGuard Fault Detection (FDC) softwa

Architect develop and implement breakthrough Ethernet/networking IP to be integrated into next-generation SoCs for automotive industrial and edge computing markets. The IP itself is challenging and of significant scope as it requires implementing very complicated and challenging algor

Architect develop and implement breakthrough Ethernet/networking IP to be integrated into next-generation SoCs for automotive industrial and edge computing markets. The IP itself is challenging and of significant scope as it requires implementing very complicated and challenging algor

Role Summary : Responsible for providing the technical and leadership oversight to assure their team executes on time and to target. Managing the team and all stakeholders with transparency as to the capacity and capability of the organization. Growth of the organization to align with

Role Summary : Responsible for providing the technical and leadership oversight to assure their team executes on time and to target. Managing the team and all stakeholders with transparency as to the capacity and capability of the organization. Growth of the organization to align with