NXP Semiconductors

Position SummaryThe Facilities Engineer is responsible for the operation maintenance and continuous improvement of building systems including Mechanical Electrical and Plumbing (MEP) with a strong focus on automation system integration and quality assurance. This role ensures reliable

Position SummaryThe Facilities Engineer is responsible for the operation maintenance and continuous improvement of building systems including Mechanical Electrical and Plumbing (MEP) with a strong focus on automation system integration and quality assurance. This role ensures reliable

A Senior Validation Engineer responsible for leading validation activities driving test automation ensuring end-to-end validation coverage and contributing to system-level quality improvements for radar and embedded platforms. The role requires a strong balance of test execution autom

A Senior Validation Engineer responsible for leading validation activities driving test automation ensuring end-to-end validation coverage and contributing to system-level quality improvements for radar and embedded platforms. The role requires a strong balance of test execution autom

The future starts here! Ready to join NXPBecome part of the startup of a dynamic team that is leading NXP on a digital transformation journey. Your role is to be an expert in data management and enable connected lifecycle automation in the post silicon validation team. There is a lot

The future starts here! Ready to join NXPBecome part of the startup of a dynamic team that is leading NXP on a digital transformation journey. Your role is to be an expert in data management and enable connected lifecycle automation in the post silicon validation team. There is a lot

The future starts here! Ready to join NXPBecome part of the startup of a dynamic team that is leading NXP on a digital transformation journey. Your role is to be an expert in data management and enable connected lifecycle automation in the post silicon validation team. There is a lot

The future starts here! Ready to join NXPBecome part of the startup of a dynamic team that is leading NXP on a digital transformation journey. Your role is to be an expert in data management and enable connected lifecycle automation in the post silicon validation team. There is a lot

Digital IP Verification Engineers 7 to 13 yrs expJob Opportunity: Seeking highly motivated energetic team-oriented Individual contributor willing to take the challenge of delivering the first pass success of complex IPs using the latest advanced verification languages and methodology.

Digital IP Verification Engineers 7 to 13 yrs expJob Opportunity: Seeking highly motivated energetic team-oriented Individual contributor willing to take the challenge of delivering the first pass success of complex IPs using the latest advanced verification languages and methodology.

Digital IP Verification Engineers 14 to 20 yrs expJob Opportunity: Seeking highly motivated energetic team-oriented Individual contributor willing to take the challenge of delivering the first pass success of complex IPs using the latest advanced verification languages and methodology

Digital IP Verification Engineers 14 to 20 yrs expJob Opportunity: Seeking highly motivated energetic team-oriented Individual contributor willing to take the challenge of delivering the first pass success of complex IPs using the latest advanced verification languages and methodology

Job Opportunity: Seeking highly motivated energetic team-oriented person driving roadmaps for IP / Subsystem domain including complete IP portfolio going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions.Working closely with experienced and mo

Job Opportunity: Seeking highly motivated energetic team-oriented person driving roadmaps for IP / Subsystem domain including complete IP portfolio going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions.Working closely with experienced and mo

Business Line Description:AI & Chip Engineering team defines and develops System on Chip ASICs Digital and Analog IPsfor a wide range of products including Automotive microprocessors Application processors Data Center and network processors.Job Summary:Lead product execution for Autom

Business Line Description:AI & Chip Engineering team defines and develops System on Chip ASICs Digital and Analog IPsfor a wide range of products including Automotive microprocessors Application processors Data Center and network processors.Job Summary:Lead product execution for Autom

IP verification engineer - PrincipalIn this role you will be responsible for verifying complex IPs involving memory controllers and interconnects collaborating with global design and architecture teams.Key responsibilitiesDevelop and execute verification plans for memory controllers i

IP verification engineer - PrincipalIn this role you will be responsible for verifying complex IPs involving memory controllers and interconnects collaborating with global design and architecture teams.Key responsibilitiesDevelop and execute verification plans for memory controllers i

GPU verification leadIn this role you will be responsible for verifying complex GPU IPs and subsystems ensuring functional correctness performance and first-pass silicon success collaborating with global design and architecture teamsKey responsibilitiesDevelop and execute verification

GPU verification leadIn this role you will be responsible for verifying complex GPU IPs and subsystems ensuring functional correctness performance and first-pass silicon success collaborating with global design and architecture teamsKey responsibilitiesDevelop and execute verification

Generic Job Description (not Job Level specific): The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including flo

Generic Job Description (not Job Level specific): The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including flo

Principal Engineer - Digital IP Verification (G4)Role OverviewWe areseekinga highly motivated technically strong and execution-focused Individual Contributor to lead and deliver first-pass success for complex Digital IP and Subsystem verification programs. The role demands deepexperti

Principal Engineer - Digital IP Verification (G4)Role OverviewWe areseekinga highly motivated technically strong and execution-focused Individual Contributor to lead and deliver first-pass success for complex Digital IP and Subsystem verification programs. The role demands deepexperti

IntroductionAI is rapidly moving beyond research labs and into the real worldpowering advancements in vehicles factories hospitals homes and everyday devices. NXPs Global Sales organization is the force that transforms our intelligent edge vision into meaningful market impact. We oper

IntroductionAI is rapidly moving beyond research labs and into the real worldpowering advancements in vehicles factories hospitals homes and everyday devices. NXPs Global Sales organization is the force that transforms our intelligent edge vision into meaningful market impact. We oper

Master/Bachelors Degree in Electrical/Electronic Engineering Experience 6-10 Years in high performance digital logic designs and SoC Integration using ARM Cores Bus Protocols and Interconnects Building Subsystems and/or SoC RTL integration LINT/CDC/RDC signoffs for the highest design

Master/Bachelors Degree in Electrical/Electronic Engineering Experience 6-10 Years in high performance digital logic designs and SoC Integration using ARM Cores Bus Protocols and Interconnects Building Subsystems and/or SoC RTL integration LINT/CDC/RDC signoffs for the highest design

Role OverviewWe areseekinga highly motivated technically strong and execution-focused Individual Contributor to lead and deliver first-pass success for complex Digital IP and Subsystem verification programs. The role demands deepexpertisein advanced verification methodologies strong o

Role OverviewWe areseekinga highly motivated technically strong and execution-focused Individual Contributor to lead and deliver first-pass success for complex Digital IP and Subsystem verification programs. The role demands deepexpertisein advanced verification methodologies strong o

Job Opportunity: Seeking highly motivated energetic team-oriented Individual Contributor driving roadmaps for Vision IP domain including complete IP portfolio going deeper into logic design and architecting and developing Complex Vision IPs solutions. Working closely with experienced

Job Opportunity: Seeking highly motivated energetic team-oriented Individual Contributor driving roadmaps for Vision IP domain including complete IP portfolio going deeper into logic design and architecting and developing Complex Vision IPs solutions. Working closely with experienced

Generic Job Description (not Job Level specific): The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including flo

Generic Job Description (not Job Level specific): The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including flo

Generic Job Description (not Job Level specific): The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including flo

Generic Job Description (not Job Level specific): The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including flo

Job Opportunity: Seeking highly motivated energetic team-oriented person driving roadmaps for IP / Subsystem domain including complete IP portfolio going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions.Working closely with experienced and mo

Job Opportunity: Seeking highly motivated energetic team-oriented person driving roadmaps for IP / Subsystem domain including complete IP portfolio going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions.Working closely with experienced and mo

Job Opportunity:Seekinghighly motivatedenergeticteam-orientedIndividual Contributorwilling togo deeper into logicdesignandtake the challenge ofarchitecting anddevelopingComplexIPs/ Subsystemsusing the latest advancedDesign flow methodologies and efficient techniques.Thepersonwould bew

Job Opportunity:Seekinghighly motivatedenergeticteam-orientedIndividual Contributorwilling togo deeper into logicdesignandtake the challenge ofarchitecting anddevelopingComplexIPs/ Subsystemsusing the latest advancedDesign flow methodologies and efficient techniques.Thepersonwould bew