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Technical Manager Physical Design


Job Location:

Seberang Perai - Malaysia

Monthly Salary: MYR 15000 - 15000
Experience Required: 5years
Posted: 24 July 2026 (30+ days ago)
Application Deadline: 21 October 2026
Vacancies: 1 Vacancy

Job Summary

Technical Leadership & Execution
Lead end-to-end digital physical design implementation from synthesized netlist to GDSII signoff across multiple client projects ensuring high-quality and timely delivery.

Design Closure & Signoff
Drive timing closure power optimization signal integrity IR drop/electromigration (IR/EM) analysis and physical verification to achieve successful design signoff.

Team Leadership & Development
Build mentor and grow a high-performing Digital Physical Design team by establishing structured training programs technical review processes and engineering best practices.

Methodology & Flow Automation
Develop enhance and automate physical design methodologies and EDA workflows using Tcl and Python to improve design efficiency consistency and productivity.

Client & Technical Engagement
Act as the primary technical interface for global clients leading design reviews providing technical guidance and supporting pre-sales activities including proposal preparation and solution discussions.

Cross-Functional Collaboration
Collaborate closely with RTL STA DFT Verification and Analog/Mixed-Signal teams both internally and externally to ensure smooth execution and successful project delivery.

Requirements
  • Bachelors or Masters degree in Electrical/Electronics Engineering Computer Engineering Microelectronics or a related discipline.
  • 8 years of hands-on Digital Physical Design experience with multiple successful tape-outs.
  • Strong proficiency in advanced-node (TSMC 16nm to 3nm/sub-3nm) physical design including floorplanning power planning P&R CTS timing closure signal integrity IR/EM analysis physical verification and MMMC.
  • Extensive experience with industry-standard Cadence Synopsys and Siemens EDA tool suites.
  • Proven technical leadership with experience mentoring teams engaging customers and communicating effectively in business English.



Required Skills:

Bachelors or Masters degree in Electrical/Electronics Engineering Computer Engineering Microelectronics or a related discipline. 8 years of hands-on Digital Physical Design experience with multiple successful tape-outs. Strong proficiency in advanced-node (TSMC 16nm to 3nm/sub-3nm) physical design including floorplanning power planning P&R CTS timing closure signal integrity IR/EM analysis physical verification and MMMC. Extensive experience with industry-standard Cadence Synopsys and Siemens EDA tool suites. Proven technical leadership with experience mentoring teams engaging customers and communicating effectively in business English.


Required Education:

Bachelors or Masters degree in Electrical/Electronics Engineering Computer Engineering Microelectronics or a related discipline.