Design Verification Lead

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profile Job Location:

Bengaluru - India

profile Monthly Salary: Not Disclosed
Posted on: 8 hours ago
Vacancies: 1 Vacancy

Job Summary

Role : DV Verifcation Engineer ( IP )

Location : BLR/HYD/CHENNAI

Notice Period : Immeidate to 30 Days

  • IP verification Using SV/UVM
  • Interconnect Protocols: .DDR/PCIe/Mipi/USB/ Ethernet/CXL/UCI/UFS
  • High Speed Serial Interfaces: PCIe or UCIe or USB or Ethernet or UPF or DDR
  • Coverage Closure: Code Functional and Toggle
  • Tools: Synopsys VCS or Cadence Incisive
  • Technical Documentation: Testbench Specification Test Plan Specification
  • Good exposure to Scripting skills like Perl or Python or Shell or TCL
  • Bachelors in Electronics Engineering is a minimum requirement
  • Masters in Electronics or Computer Science Engineering is an added advantage
  • 8 to 15 years minimum
  • Exposure to working in multi-national environment is required
  • Excellent oral and written communication skills is a must.
  • An attitude to learn and grow. Adaptability and flexibility are desired.
Role : DV Verifcation Engineer ( IP ) Location : BLR/HYD/CHENNAI Notice Period : Immeidate to 30 Days IP verification Using SV/UVM Interconnect Protocols: .DDR/PCIe/Mipi/USB/ Ethernet/CXL/UCI/UFS High Speed Serial Interfaces: PCIe or UCIe or USB or Ethernet or UPF or DDR Coverage Closure: Code ...
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