Staff ASIC Design Engineer

We are seeking a talented and innovative Staff ASIC Design Engineer to join our dynamic team in Hyderabad this role you will take ownership of critical ASIC design projects driving the development and implementation of sophisticated System-on-Chip (SoC) solutions. You will collaborate with cross-functional teams to deliver high-quality silicon products from concept through production maturity. This is an excellent opportunity for an experienced design professional to make a significant impact on cutting-edge semiconductor technology while fostering innovation and technical excellence.

• Design and implement RTL blocks with a focus on micro-architecture optimization ensuring efficient and implementable solutions
• Develop clear comprehensive micro-architecture specifications and technical documentation for various design components
• Execute synthesis timing closure and optimization activities to meet performance and power requirements
• Collaborate effectively with firmware software design verification FPGA DFT and backend teams throughout all stages of ASIC development
• Support prototyping activities test program development and comprehensive chip validation from initial bring-up through production maturity
• Conduct design bring-up and debug on FPGA-based emulation platforms identifying and resolving complex technical issues
• Implement and analyze assertions and coverage metrics to ensure design quality and completeness
• Work with industry-standard interface protocols including PCIe USB Ethernet DDR/LPDDR4/5 I2C/I3C eSPI and SPI
• Mentor junior engineers and provide technical guidance on design best practices and methodologies
• Utilize scripting languages and repository management tools to streamline design workflows and maintain code quality

Qualifications :

• 7 years of hands-on experience in RTL logic design verification synthesis and timing optimization
• Demonstrated expertise in writing efficient synthesizable RTL code in Verilog with strong SoC integration knowledge
• Proficiency in micro-architecture design and the ability to translate specifications into robust implementations
• Solid understanding of assertions coverage analysis RTL synthesis methodologies and timing closure techniques
• Extensive experience with interface protocols such as PCIe USB Ethernet DDR/LPDDR4/5 I2C/I3C eSPI and SPI
• Proven experience with FPGA-based emulation platforms (HAPS Veloce) for design validation and debugging
• Fluency with scripting languages including Perl and Python for design automation and tool development
• Experience with repository management tools (Bitbucket Jenkins) and bug tracking systems (JIRA)
• Successful completion of at least one full tape-out cycle from design through silicon validation
• Strong communication and documentation skills with the ability to articulate complex technical concepts clearly
• Demonstrated ability to work collaboratively in cross-functional team environments
• Excellent analytical and problem-solving capabilities with attention to detail
• Preferred: Silicon bring-up and debug experience on actual hardware
• Preferred: Experience mentoring or leading junior design engineers
• Preferred: Familiarity with design methodologies standards and industry best practices

Additional Information :

Axiado is committed to attracting developing and retaining the highest caliber talent in a diverse and multifaceted environment. We are headquartered in the heart of Silicon Valley with access to the worlds leading research technology and talent.

We are building an exceptional team to secure every node on the internet. For us solving real-world problems takes precedence over purely theoretical problems. As a result we prefer individuals with persistence intelligence and high curiosity over pedigree alone. Working hard and smart continuous learning and mutual support are all part of who we are.

Axiado is an Equal Opportunity Employer. Axiado does not discriminate on the basis of race religion color sex gender identity sexual orientation age non-disqualifying physical or mental disability national origin veteran status or any other basis covered by appropriate law. All employment is decided on the basis of qualifications merit and business need.

Remote Work :

No

Employment Type :

Full-time