DFT Engineer

We are at apivotal momentin the semiconductor industry. Technology is evolving at an unprecedented pace and Texas Instruments MCU organization is right at the center of this transformation.

Our current work is focused on developing solutions forhigh-growth markets including AI-driven data centers and emerging domains such ashumanoid systems. These areas are actively shaping the future of computing automation and intelligent systems offering a rare opportunity to work on cutting-edge technologies with real-world large-scale impact.

If you are passionate about solving complex technical challenges and want to contribute to innovations in these fast-growing segments this is your moment. This role is not only technically rewarding it isstrategically significant.

Texas Instruments is seeking an experienced and drivenDFT engineer to execute and shape the test engineering strategy within our MCU this role you will direct and guide the activities of a research and technical design function responsible fordesigning developing modifying and evaluatingdigital electronic parts components and integrated circuitry for electronic equipment and hardware systems.

You will play a critical leadership role in ensuring that our silicon is not only designed for performance and power efficiency but also fortestability reliability and manufacturability qualities that are essential as we scale into AI and next-generation compute platforms.

Key Responsibilities

• Execute DFT strategy and executionacross complex SoC and MCU designs targeting AI data center and humanoid system applications
• Collaborate cross-functionallywith design verification physical design and manufacturing teams to integrate DFT methodologies early in the design cycle
• Drive continuous improvementin test coverage fault detection and test time reduction across product families
• Select develop and evaluate personnelto ensure efficient operation of the DFT function; mentor engineers and foster a culture of technical excellence

Minimum Qualifications

• Bachelors degree in Electrical Engineering Computer Engineering or related field (Masters or PhD preferred)
• 3 years of experience in digital design or DFT engineering
• Expertise in DFT methodologies: scan insertion ATPG BIST (Logic/Memory) JTAG boundary scan and test compression
• Hands-on experience with industry-standard EDA tools (e.g. Synopsys TestMAX Mentor Tessent)
• Understanding of SoC/MCU architecture and digital design flows

Preferred Qualifications

• Background in embedded systems or MCU product development
• Experience with silicon bring-up failure analysis and yield improvement initiatives