Senior Digital Mixed Signal DV Engineer

About TI
Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the worlds brightest minds TI creates innovations that shape the future of technology. TI is helping about 100000 customers transform the future today. Were committed to building a better future from the responsible manufacturing of our semiconductors to caring for our employees to giving back inside our communities and developing great minds. Put your talent to work with us change the world love your job!

Who are we and what do we do

The advanced circuits and power solution business is known for delivering industry leading custom IC system solutions including display and touch power products charger power products camera PMICs power path devices sensing devices and high-performance communication interface products. Our products integrate precision signal-chain and highly efficient power components in ultra-small form factors that enable TIs best-in-class customer to translate their ideas to high value products that revolutionize the personal electronics market.

In this team you will get to work with and learn from incredibly talented technical leaders who have influenced TI technology productivity and way of working in a creative and impactful way. You will get to directly interact with one of TIs valued and high-volume customers by way of intense technical reviews and architecture discussions!

By enabling designs that are highly impactful to TI revenue and working with a critical customer on a versatile set of products you will find yourself on an accelerated career path.

About the job

If you are looking to join an ingenious vigorous & ambitious team that consistently delivers groundbreaking technologies into the custom mobile electronics world here is an opportunity for you!

Senior Analog Mixed-Signal (AMS) Verification Engineer

Location: Bangalore India

Experience: 310 Years

What will you be doing in this role

• Verification Strategy: Develop detailed coverage-driven Verification Plans by collaborating closely with System Application and Design teams.
• Modelling & Simulation: Create high-fidelity analog behavioural models using Verilog-A Verilog-AMS Wreal (RNM) or EENet to enable efficient top-level simulation.
• Environment Development: Build and enhance mixed signal testbenches using a combination of schematic models and RTL.
• Checkers & Assertions: Implement real-time analog checkers and post-processing checker strategies to ensure functional correctness.
• Full-Cycle Verification: Execute RTL and Gate Level Simulations (GLS) running regressions and tracking functional coverage goals until tape-out.
• Collaboration: Work with Digital DV Analog Designers and Post-Silicon Validation teams to debug complex issues and ensure successful product delivery.

• Education: Bachelors or Masters degree in Electrical Engineering (EE) or Electronics and Communication Engineering (ECE)
• Experience: Minimum 3 years of hands-on experience in Analog Mixed-Signal (AMS) design verification.
• Modelling Skills: Proficiency in analog behavioural modelling using Verilog-AMS Verilog-A or Wreal.
• Verification Flow: Direct experience with mixed-signal verification involving a combination of schematic behavioural models and RTL.
• Tool: Strong command of Cadence Virtuoso/AMS Designer toolsets and debug environments or other standard mixed-signal simulation tools
• Communication: Clear ability to present technical analysis and conclusions to internal stakeholders and business leaders.

• Advanced DV: Knowledge of SystemVerilog (SV) and UVM as the top-level environments are built on these frameworks.
• Automation: Proficiency in scripting (Python Perl or Shell) to automate simulation flows and data and interest in building AI-driven verification methodologies.
• Domain Expertise: Experience in signal processing PMICs or high-speed communication interfaces.
• Silicon Interaction: Experience in silicon debug and working alongside silicon validation teams.
• Standard protocols exposure: Verification experience with I2C SPI UART ASI etc.