Digital Design Verification Engineer

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Texas Instruments is seeking Design Verification this role you will confirm the accuracy of designs for analog and mixed signal electronic parts components or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems before pattern generation/mask development. The role will require working independently from the product development team who designed the devices to confirm adherence to known design rules procedures and best practices. Additional job functions include analyzing equipment to establish operating data and conducting experimental tests and evaluating results to confirm the device meets all requirements in the specifications. You may also run software simulations selecting components and equipment based on analysis of specifications and reliability. As a Design Verification Engineer you may also review vendor capability to support product development. Requires a BS degree or equivalent experience in the design of equipment components or circuitry.

We are looking for a Digital Design Verification Engineer to join the team of enthusiastic engineers who develops highly complex mixed signal devices for audio applications with industry leading performance.

These audio products are truly mixed-signal devices with highly integrated digital circuits such as a DSP core for digital filters and audio signal processing blocks hardware processing blocks analog controllers various interfaces (Soundwire SWI3S Audio serial interfaces I2C SPI) and other digital blocks like clock-generation registers map Interrupts etc.

This is a great opportunity to be part of an established team thats continuing to look for growth opportunities working with worldwide leading customers and developing cutting edge solutions in the areas of consumer electronics industrial and automotive markets.

Minimum Requirements:

• Bachelors degree in Electrical/Electronics Engineering.
• 3 years of Digital design verification experience.

What can you expect to learn in this role/Opportunity

• To work with the best experts in the industry.
• To develop capability to work effectively in a technically challenging fast-paced and rapidly changing environment.
• To innovate on core technology in verification methodologies& influence decisions that have wide business impact across many products & teams.
• To work on cutting edge industry leading products.
• To learn overall product development Process and directly influence the features differentiation & quality of the product.
• Tolearn and develop business insights drive open discussionswith business & technology leaders and drive decisions impacting product & technology execution.
• To build strong influential relationshipswith domain experts.
• To develop good communication interpersonal skills while interacting with worldwide cross functional experts.
• To learn identifying risks across domains and adapt to support changing priorities.
• To present analysis and conclusions to internal customers and business leadersin a comprehensive and effective manner.
• To work closely with cross-domain experts other engineers and interns.

Basic Requirement:

• Strong digital design fundamentals & basic Electrical engineering
• Experience with Verilog System Verilog languages with UVM methodology.
• Experience on randomization and coverage driven digital verification.
• Experience in working with VIPs creating TB components agents monitors scoreboards and other ways to automate verification.
• Hand on experience in RTL and Gate level simulations of complex ASIC at block and top level
• Expert in using simulation tools (preferably Cadence Xcelium/Ncsim).
• Basic scripting knowledge using shell/python/perl.
• Excellent debugging and problem-solving skill.
• Excellent in Coverage driven verification with code coverage functional coverage
• Experience in Formal verification (using Jasper Gold) is good to have

• Good communication presentation skills and teamwork.

Primary Responsibilities:

• Responsible to develop detailed coverage driven Verification plan working closing with System and Application team and design team.
• Owning part of digital verification of the sub-system and full-chip by working closely with other verification team members leads including outside services.
• Develop/Enhance SV/UVM based testbenches and tests and simulations at all phases (RTL GLS)
• Understanding spec and coming up with testplan. Writing TB components testcases checkers assertions enhancing with randomization and coverage-feedbacks.
• RTL and GLS regression and follow-up with tracking of the various activities. Run Functional and Code-coverage(including firmware coverages) and meet the defined coverage goals.
• Good interaction with Digital Design team Firmware developers Analog Designers and rest of the team.
• Excellent teamwork adapting to situations and ability to guide help DV members Communication of DV status issues and concerns.
• Innovate & drive new and improved design verification methodologies where needed work with the EDA team to upgrade tools and flows.
• Interacting with Test/Silicon Validation/Application Engineering team to ensure successful use of products and support customer applications debug/analysis.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

Preferred Qualifications:

• Demonstrated strong analytical and problem-solving skills.
• Effective communication skills to interact with all stakeholders.
• Ability to work in teams and collaborate effectively with people in different functions.
• Strong time management skills that enable on-time project delivery.
• Ability to work effectively in a fast-paced and rapidly changing environment.
• Ability to take the initiative and drive for results.
• Ability to build strong influential relationships with cross-functional teams.

Added Advantage:

• Experience in silicon debug along with design and silicon validation team.
• Experience in audio signal processing and understanding of audio systems/applications.
• Hands-on exp on I2C SPI ASI protocols.
• Hand on experience on Cadence tools