Analog Layout Engineer

We are seeking a Lead Analog Layout Engineer to spearhead the custom layout implementation for analog/mixed-signal (AMS) modules and custom-digital blocks within our SoC this role you will be responsible for delivering high-quality physical verification-clean layouts while leading a team of junior engineers to meet aggressive project schedules. You will work at the intersection of design and manufacturing ensuring all layouts are optimized for performance power and manufacturability.

• AMS Layout Crafting: Develop high-performance layouts for AMS IPs by executing proper floorplanning and routing while strictly addressing constraints such as matching parasitics and signal flow.

• Optimization: Ensure robust power distribution and area efficiency reviewing all progress with the Analog Design team to align on performance targets.

• Physical Verification: Take full ownership of achieving a Physical Verification clean layout (DRC/LVS/Antenna).

• Full-Chip Integration: Manage extensive PAD Ring and Chip-top level layout integration including the merging of Analog IPs and Digital GDS.

• Team Mentorship: Lead and mentor a team of junior layout engineers reviewing their work to ensure high-quality standards across all deliverables.

• Project Planning: Partner closely with the design team to plan layout schedules discuss technical trade-offs and resolve layout-related issues effectively.

• Quality Control: Implement Knowledge of Design for Manufacturability (DFM) principles to ensure high yield and reliability.

• Tool Expertise: Expert proficiency in Cadence Virtuoso LayoutXL for correct and robust layout delivery.

• Verification Mastery: Hands-on experience with the Calibre suite for DRC LVS and verification including generating extracted views for post-layout simulations.

• Process Technology: A MUST-have experience in FinFET and Planar Si CMOS technologies; additional experience in SiGe or GaN is a significant plus.

• Domain Expertise: Expertise in the layout of high-speed SERDES RF and/or PM (Power Management) modules is mandatory.

• Problem Solving: Proven ability to troubleshoot complex layout-related issues and optimize for signal integrity.

• Education: B.S./M.S. in Electrical Engineering or a related field.