Design For Test (DFT) Engineer
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Job Location:
San Diego, CA - USA
Hourly Salary:
$ 65 - 75
Posted on:
Yesterday
Vacancies:
1 Vacancy
Job Summary
Job Description
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Design For Test (DFT) Engineer
This is a Contract role.
Position: Design For Test (DFT)Engineer (Contract Role)
The team is looking for a Design-for-Test contractor to test and validate the next generation chips. Candidate will be responsible to work with Front End and Physical Design teams to implement DFT and test designs which will impact the product lines for radio frequency (RF) and BlueTooth/Wireless LAN chipsets.
JOB RESPONSIBILITIES:
Experience with memory BIST Siemens Tessent Flow
Experience with gate-level simulation and simulation debug
Experience with automation and scripting Tcl/Perl/Python
Experience with scan compression SEQ/Ultra/TestKompress
Experience with ATPG Tetramax
Experience with ATPG diagnosis ATE debug and silicon bring up
DFT pattern translation VTRAN
Experience with RTL design Verilog/system Verilog
Some experience with STA and timing analysis concepts PrimeTime (CDC clock gating checks timing constraints)
Requirements
REQUIRED SKILLS AND EXPERIENCE:
5 years relevant industrial DFT experience
Excellent problem solving and debugging skills Ability to complete assignments independently
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Saige Partners one of the fastest growing technology and talent companies in the Midwest believes in people with a passion to help them succeed. We are in the business of helping professionals Build Careers Not Jobs. Saige Partners believes employees are the most valuable asset to building a thriving and successful company culture which is why we offer a benefit package and convenient weekly payment solutions that helps our employees stay healthy and maintain a positive work/life balance. Contact us to learn more about the opportunity below or check out other opportunities at Experience:
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