PCIe Validation Engineer

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profile Job Location:

San Jose, CA - USA

profile Monthly Salary: Not Disclosed
Posted on: 11 hours ago
Vacancies: 1 Vacancy

Job Summary

Skill Need : PCIe Gen 4/5/6 CXL RISC-V ARM Oscilloscope Multimeter Logic & Power Analyzer BERTS C/C Python Perl Windows Linux
Job Description
  • Take lead responsibility for validating PCIe and its subsystems on multiple SoC platforms.
  • Define comprehensive test plans and execute tests covering memory training procedures performance benchmarks stress scenarios timing margin analysis and overall reliability.
  • Collaborate with design and firmware teams to develop integrate and debug firmware essential for PCIe training.
  • Write necessary firmware components (like bootloaders PCIe drivers test hooks) to enable testing.
  • Integrate and debug firmware for PCIe initialization and training specifically on systems using RISC-V or ARM processors.
  • Work closely with software and hardware teams to ensure firmware and hardware components interact correctly.
  • Coordinate with board and Signal/Power Integrity (SI/PI) teams for related evaluations.
  • Utilize standard lab equipment (oscilloscopes logic analyzers BERTs power analyzers) for test execution data collection and troubleshooting memory-related issues.
  • Perform root cause analysis for failures.
  • Develop scripts (Python Perl C/C) to automate test procedures and validation workflows.
  • 5 to 8 years of experience
  • 5 years of SOC validation experience
  • At least 4 years of experience in post-silicon PCIe subsystem validation
  • Strong C/C programming skills particularly for low-level code (like hardware abstraction layers) used in system bring-up.
  • Proven experience integrating and debugging firmware in PCIe validation or general SoC environments.
  • Deep understanding of PCIe protocols (Physical Data Link Transaction layers) PCIe Gen 4/5/6 and CXL
  • Experience with silicon bring-up processes and Hands-on experience with PCIe protocol analyzers and oscilloscopes.
  • Familiarity with embedded operating systems and the typical boot sequences.
  • System-level PCIe performance tuning and characterisation.
  • Experience with Linux and Windows operating systems
Skill Need : PCIe Gen 4/5/6 CXL RISC-V ARM Oscilloscope Multimeter Logic & Power Analyzer BERTS C/C Python Perl Windows Linux Job Description Take lead responsibility for validating PCIe and its subsystems on multiple SoC platforms. Define comprehensive test plans and execute tests covering me...
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Key Skills

  • Python
  • SOC
  • Debugging
  • C/C++
  • FDA Regulations
  • Minitab
  • Technical Writing
  • GAMP
  • OS Kernels
  • Perl
  • cGMP
  • Manufacturing