Senior IC Package Design Engineer [Onste]
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Job Location:
Santa Clara County, CA - USA
Monthly Salary:
Not Disclosed
Posted on:
4 days ago
Vacancies:
1 Vacancy
Job Summary
Position: Senior IC Package Design Engineer
Location: Santa Clara CA (Onsite)
Duration: 6 Months (Ongoing)
Visa: Any (Onsite work required)
Requirements
Bachelors degree in Computer Science Electrical Engineering or related fields and 10-15 years of related professional experience.
Masters degree and/or PhD in Computer Science Electrical Engineering or related fields with 5-10 years of experience.
Job Responsibilities
- Experience with 2.5D package design and development like CoWoS
- Strong expertise in using IC package layout tools like Cadence APD
- Understanding IC package design requirements for high-speed interfaces and setup constraints manager
- Interface with the IC physical design teams for optimizing the die floor plan
- Experience in interfacing with Substrate suppliers and OSATs
- Ability to do automation of the layout tasks using scripting
- Power plane design and translating power supply requirements into design
- Familiarity with IC packaging technologies materials substrate design rules and assembly rules
- Track record of new product introduction from concept through development and production is a plus
- Knowledge of the thermal and mechanical analysis of the IC package development is a plus
- A team player with strong communication presentation and documentation skills
Key Skills
- Electrical Engineering
- SOC
- PCB
- Warehouse Management
- Warehouse Experience
- CAD
- Creo
- SolidWorks
- Data Mining
- Digital design
- Mechanical Engineering
- Autocad
