ASIC Design Engineer
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Job Location:
Monthly Salary:
Posted on:
13 hours ago
Vacancies:
1 Vacancy
Job Summary
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Contribute to the design implementation and integration of SoCs.
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Perform micro-architecture design RTL coding synthesis timing closure and documentation of various RTL blocks.
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Support prototyping test program development chip validation and lifecycle management through production maturity.
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Collaborate closely with firmware software DV FPGA DFT SoC integration and backend teams across all stages of ASIC development.
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8 years of experience in RTL logic design verification synthesis and timing optimization.
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Strong ability to write clear and implementable micro-architecture specifications.
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Expertise in Verilog RTL coding and SoC integration.
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Solid understanding of assertions coverage analysis RTL synthesis and timing closure.
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Hands-on experience with interface protocols like PCIe USB Ethernet DDR/LPDDR4/5 I2C/I3C eSPI SPI etc.
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Experience in design bring-up and debug on FPGA-based emulation platforms such as HAPS or Veloce.
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Proficiency in scripting languages (Perl Python).
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Must have completed at least one full tape-out cycle.
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Preferred:
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Silicon bring-up and debug experience.
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Familiarity with repository and bug tracking tools like Bitbucket Jenkins and JIRA.
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Key Skills
- Mechanical Design
- SOC
- System Design
- GD&T
- CAD
- Creo
- SolidWorks
- Mechanical Engineering
- Perl
- Autocad
- HVAC Design
- Catia
About Company
Proxelera’s unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. In this regard, we have signed up with the Israeli company, TechLink ... View more
