Mixed Signal Model Verification Engineer
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Job Location:
San Jose, CA - USA
Monthly Salary:
Not Disclosed
Posted on:
16-10-2025
Vacancies:
1 Vacancy
Job Summary
Overview:
TekWissen is a global workforce management provider headquartered in Ann Arbor Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara California that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories graphics processors motherboard chip sets and a variety of components used in consumer electronics goods.
Job Title: Mixed Signal Model Verification Engineer
Work Location: San Jose CA
Duration: 3 Months
Work Type: Temporary Assignment
Job Type: Hybrid
Job Description:
- We are seeking a detail-oriented mixed signal model engineer to verify behavioral models written in SystemVerilog both logic and real number. It will involve writing constraints and stimulus for CAD tools to run equivalence check against the schematic.
- It is required to read and understand the mixed signal circuit schematic to debug any mismatch between behavioral model and circuit transistor-level behavior.
- Modification to the behavioral models to make it equivalent to the mixed signal circuit is expected.
MUST HAVE SKILLS:
- Extensive experience in modeling mixed signal circuits in SystemVerilog including real number modeling
- Strong understanding of HDL/SPICE co-simulations
- Strong understanding of custom circuit schematic
- Strong background in analog integrated circuit design
- Proficiency in RTL design languages like SystemVerilog
- Experience with formal equivalence checking tools like ESP
TekWissen Group is an equal opportunity employer supporting workforce diversity.
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