Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence inspiring the world to learn communicate and advance faster than ever.

As a Layout Design Environment CAD engineer you will be responsible for developing and releasing layout design flows based on EDA vendor tools. To facilitate this you will be collaborating with not only the global CAD team members but also with the global layout design organization to acquire their needs to develop solutions which will enhance the productivity and speed of layout design. You will also be working with the layout design tool EDA vendors to facilitate fixing tool issues and to propose new functionality which would be advantageous for Micron.

CADエンジニアとしてレイアウト設計効率化及び品質向上を目的としたEDAツールの利用技術レイアウト設計手法フローの開発評価運用を担当しますこの分野にはレイアウトデザイン編集用ツールレイアウト効率化自動化を目的とした手法が含まれます業務遂行に当たってはより円滑且つ効果的にレイアウト設計上の生産性やパフォーマンス向上へと繋がるソリューションを提供する為グローバルなレイアウト設計チームと連携し課題やニーズの把握に取り組みます更にEDAベンダー各社と協力しながらこれらツールの問題点の分析修正やさらなる改善を促すことでMicronにとって有利な新機能を提案します

• Develop new methodologies with respect to the Micron layout design environment and implement them into the common CAD design environment being used globally for DRAM and NAND products.
• Communicate and collaborate with global CAD members to develop and support these design flows.
• Actively connect with external EDA vendors to acquire information on new vendor tools/flows and fix bugs. Test/evaluate these tools/flows for implementation and release them into the Micron design environment.
• Providing training documentation and support to end-users on new tools and methods.
• Participate in design Lessons Learned meetings to receive feedback on improvements and then drive those improvements.
• Participate in global forums which discuss new approaches to layout design (e.g. Worldwide Layout Steering Team).

• Micron製品開発に於いてレイアウト設計手法に関わる新たなメソドロジーを考案開発しDRAM及びNAND製品開発用のMicron標準設計環境として実装運用します
• グローバルチームとの協業によりこれら手法の開発及び設計サポートを実施します
• EDAベンダー各社と連携し新しいEDA技術やフローに関する情報取得導入また既存ツールへの新機能組み込みや不具合修正にも取り組みますこれらのツール/フローは事前テスト/評価をした上でMicron標準設計環境としてリリースします
• 新しいツールや手法に関するトレーニングやサポートガイドライン等ドキュメントをエンドユーザーに提供します
• Design Reviewを介して改善に関するフィードバックを受け取りそれらの改善を推進します

Qualifications:

Knowledge and experience of the following:

• Understand and have experience using chip design environments especially using the layout design tools (e.g. Cadence Virtuoso Layout Pulsic Unity Router).
• Understand the concepts of auto placement and auto interconnect routing methodologies.
• Have basic knowledge of Microns process technology. Have experience in programming in Python and Cadence SKILL with perl and C/C also a plus.
• Have a willingness to learn the above items if experience is limited.
• Have excellent communication and problem-solving skills

• DRAM/NAND設計検証技術やEDAツール特にレイアウト設計ツール(Cadence Virtuoso LayoutPulsic UnityiTool等)の目的利用方法について理解し使用した経験があること
• LSIレイアウト設計に於ける自動配置配線の概念を理解していること
• プロセス技術に関する基本的な知識を有すること
• Python及びCadence SKILLのプログラミング知識経験を有することPerlとC/Cの経験もあれば尚良し
• 優れたコミュニケーション能力と問題解決能力を有すること
• これらの経験が限定的である場合各項目を学ぶ意欲が必要です

About Micron Technology Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich lifefor all. With a relentless focus on our customers technology leadership and manufacturing and operational excellence Micron delivers a rich portfolio of high-performance DRAM NAND and NOR memory and storage products through our Micron and Crucial brands. Every day the innovations that our people create fuel the data economy enabling advances in artificial intelligence and 5G applications that unleash opportunities from the data center to the intelligent edge and across the client and mobile user experience.

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Micron Prohibits the use of child labor and complies with all applicable laws rules regulations and other international and industry labor standards.

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