NAND Product Development Engineer - Wafer Level Reliability

We are seeking a detail-oriented and technically strong Product Development Engineer to support Wafer Level Reliability (WLR) activities for NAND components across High Volume Manufacturing (HVM) and New Product Introduction (NPI). In this role you will be responsible for ensuring product reliability and quality through rigorous WLR testing data analysis and cross-functional collaboration with R&D process integration test and manufacturing teams. Your work will directly impact the successful ramp of new technologies and the sustained performance of existing products.

Key Responsibilities:

• Plan execute and analyze Wafer Level Reliability (WLR) tests to evaluate NAND component robustness failure mechanisms and lifetime predictions.
• Support both NPI and HVM product phases by establishing and monitoring WLR qualification plans and driving data-based decision-making.
• Collaborate with process integration and design teams to investigate and resolve reliability issues and identify improvement opportunities.
• Define and maintain reliability test flows test vehicles and structures specific to NAND technologies.
• Analyze large datasets using statistical tools to track reliability metrics spot trends and ensure test coverage.
• Provide reliability risk assessments and present findings to cross-functional stakeholders.

Qualifications :

• Bachelors or Masters degree in Electrical Engineering Materials Science Physics or a related field.
• 37 years of experience in semiconductor reliability test engineering or product development with a focus on NAND Flash or memory devices.
• Solid understanding of WLR methodologies including BTI HCI TDDB EM and other failure mechanisms relevant to NAND devices.
• Proficiency in data analysis tools such as JMP Python MATLAB or equivalent.
• Experience working in a cleanroom or wafer fab environment with strong knowledge of manufacturing flows and test infrastructure.

Preferred Qualifications:

• Hands-on experience with NAND device physics 3D NAND architecture or memory characterization techniques.
• Familiarity with JEDEC and industry-standard reliability specifications.
• Strong communication and cross-functional collaboration skills.

Additional Information :

The compensation range for this role is $89620 - $158660. Actual compensation is influenced by a variety of factors including but not limited to skills experience qualifications and geographic location. 
 

This would be a hybrid role (2-3 days per week) out of either Rancho Cordova California OR San Jose California.

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Remote Work :

No

Employment Type :

Full-time