Cellular IP Design Engineer (m/f/d)
Cellular IP Design Engineer (m/f/d)
Posted on :
23-08-2025
Employer Active
1 Vacancy
Job Alert
You will be updated with latest job alerts via emailValid email field required
Send jobs
Share
Send me jobs like this
Job Alert
You will be updated with latest job alerts via emailValid email field required
Send jobs
Job Description
As a Cellular design engineer you will be developing integrating & verifying IP sub-components for a cellular transceiver System on Chip. You would be responsible for defining and driving the implementation timing closure and power optimizations in close collaboration with a multi-disciplinary group from system digital analog & firmware design to design verification and physical design teams which will support your daily work. Your work will not be limited to design. It will cover end-to-end responsibility across the project lifecycle for the IPs developed from concept to design verification integration silicon validation and finally in-field operation.
- Experienced with crafting low-power customized hardware for digital signal processing. Understanding of signal processing principles. Abstract modeling skills for synthesis and simulation using modern modeling language. (Verilog / System Verilog).
- Hands-on experience in multiple sophisticated ASIC or FPGA designs spanning from concept to productization.
- Hands-on experience with digital logic design and quality checks such as Lint and CDC/RDC.
- Proficient in using (System)Verilog the ability to analyze RTL/Netlist designs and outstanding debugging skills to solve technical challenges.
- Familiar with day-to-day usage of scripting languages (e.g. TCL Python Perl shell) Linux and revision control systems (e.g. Perforce) database management and releases.
- Passion for owning/driving design topics using well-defined metrics a strong initiative and ownership of responsibilities productive and able to meet daring deadlines.
- Very good interpersonal skills and the ability to communicate abstract concepts to different stakeholders. Excellent problem-solving skills and the ability to find effective technical solutions between partners in RTL design Firmware System Engineering Power and Physical Design teams.
- English language proficiency is a requirement for this position.
- Experience with on-chip communication buses & fabrics like AMBA/Wishbone and processor sub-systems would be a plus.
- Experience with SystemC/C hardware design modeling high-level synthesis and logical synthesis would be desirable.
- A bachelors masters or Ph.D. in electrical engineering Communication Engineering Computer Science/ Software Engineering or equivalent.
- Apple is an equal-opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants regardless of race color religion sex sexual orientation gender identity national origin disability veteran status or other legally protected characteristics. Apple is committed to working with and providing reasonable accommodation to applicants with physical and mental disabilities.
- The minimum salary pursuant to the CBA amounts to EUR 66676 gross per year for full-time employment. Actual salaries are oriented at current market salaries and take your qualifications and experience into account.
Employment Type
Full Time
Key Skills
Report This Job
Disclaimer: Drjobpro.com is only a platform that connects job seekers and employers. Applicants are advised to conduct their own independent research into the credentials of the prospective employer.We always make certain that our clients do not endorse any request for money payments, thus we advise against sharing any personal or bank-related information with any third party. If you suspect fraud or malpractice, please contact us via contact us page.
