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THE ROLE:
Physical design including block level place/cts/route full chip floor planning timing closure physical verification etc.
THE PERSON:
Always be positive dedicated and good team player
Good listening writing and speaking English
Good communication skills
KEY RESPONSIBILITIES:
Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation.
Focus on physical design of deep sub-micron GPU chips including block level full chip floor planning timing closure place and route physical verification etc. The individual is expected to be an expert in multiple aspects in PD areas and provide technically leadership to the engineering team.
The individual is also expected to be accountable for project delivery.
EXPERIENCE AND SKILLS:
Tape-out experience in deep submicron process
Knowledgeable in all aspects of ASIC design flow
Demonstrate strong leadership and work well with cross-functional teams
Hands on experience in physical design is a plus
Demonstrate strong leadership work well with cross-functional teams
Familiar with Unix/Linux environment
Familiar with Back-End (physical design) EDA tools is a plus
Familiar with Front-End EDA tools is a plus
Good at scripts like Python/perl/Tcl/shell
ACADEMIC CREDENTIALS:
MSEE / Microelectronic preferred
CET-6 preferred
MSEE with 10 years or Bachelor with 13 years of industrial experience in ASIC design
LOCATION:
Shanghai
AMD does not accept unsolicited resumes from headhunters recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race marital status sex age color religion national origin veteran status disability or any other characteristic protected by law.
#LI-VC1
Requisition Number:168890
Country/Region/Location:ChinaState/Province:ShanghaiCity:Shanghai
Job Function:Design
Required Experience:
Senior Manager
Full-Time