Implement key 3GPP digital signal processing algorithms with very tight time latency and energy budgets by interfacing to specialized cellular ASIC hardware. If you have strong hardware programming understanding you will implement firmware which implements 3GPP channels and procedures such as: PDCCH PDSCH PBCH PUCCH PUSCH PRACH UL/DL HARQ. If you have linear algebra and signal processing understanding you may implement some of the following:- Channel Estimation- Channel State Feedback- Interference Cancellation- Cell Search and Measurement- Beam MeasurementWork with systems engineers to refine signal processing algorithms for efficient firmware/hardware execution - Specify design and implement the firmware architecture for superior power performance and cost.- Assist in the development on pre-silicon emulation systems/virtual platforms and use them for verification.- Evaluate and implement groundbreaking tools for build formal verification and test.- Define methodologies and standard processes
BS and 3 years of relevant industry experience.
Experience either with implementing digital signal processing algorithms using special purpose digital signal processing HW -OR- wireless physical layer channels by interfacing to special purpose hardware.
Deep understanding of software engineering principles and core computer science fundamentals.
Fundamental facility with C and C compilers build and source code control tools.
Experience with silicon prototyping emulation systems and virtual platforms.
Solid understanding of computer architecture with particular emphasis on the HW/SW interfaces of high-speed communication subsystems.
Some mainstream OS application-level development and Python or Perl scripting experience.
Understanding of 5G and 4G 3GPP protocols.
Some familiarity with wireless communications.
Significant experience with memory constrained Real Time Operating Systems (RTOS) and concurrent programming.
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