Senior Engineer I - Design
Senior Engineer I - Design
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Job Description
Are you looking for a unique opportunity to be a part of something great Want to join a 20000member team that works on the technology that powers the world around us Looking for an atmosphere of trust empowerment respect diversity and communication How about an opportunity to own a piece of a multibillion dollar (with a B!) global organization We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchips nationallyrecognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development valuesbased decision making and strong sense of community driven by our Vision Mission and 11 Guiding Values; we affectionately refer to it as the Aggregate System and its won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Microchips Data Center Solutions Business Unit (DCS) offers industry leading performance reliability and security for PCIe Switches and NVME Controllers. As a Senior Engineer IDesign you will provide leadership in the highly successful PCIe Switch product line. These complex 200M gate integrated silicon devices enable top tier data centers in next gen storage artificial intelligence and automotive market segments.
As a Senior Engineer IDesign your job will entail the following:
Design of complex digital integrated circuits at the block subsystem or device level (100K to 50M gates) which are coded in Verilog System Verilog
Define subsystem/block feature sets describe design and implementation details into engineering documents and registers documents
Support emulation ASIC lab validation including lab debug and providing logic modifications and workarounds
Communicate regularly with the design and verification team in multiple locations to resolve issues communicate status and solve technical problems
Communicate with architects to justify design implementation decisions and associated tradeoffs
Read and understand applicable storage and computer interface protocol standards
Requirements/Qualifications:
Bachelors or Masters degree in Electrical Engineering Computer Engineering or equivalent
5 years related experience
RTL Design Experience in RTL Design using System Verilog Verilog is required.
Experience and understanding of complex ASIC design flows including block and chip level simulation and debug logic synthesis static timing analysis layout and revision control
Experience with Formal Verification a plus.
Working knowledge of design and verification tools such as Synopsys Design Compiler Cadence Incisive waveform viewers and other similar tools.
Scripting and programming skills using csh bash perl python tcl etc.
Protocol knowledge and experience in PCIExpress will be an asset
Knowledge of AHB/AXI bus protocols is desired.
Excellent knowledge in logic synthesis and static timing analysis.
Experience in designing the chip top level with IOs pin out and package design
Worked with physical design teams for layout implementation.
Familiar with low power methodology and flows.
Capable of debugging EDA tool issues or design related issues.
Working knowledge of DFT.
Excellent analytical and debugging skills and the ability to proactively solve issues
Good verbal and written communication skills in English will be an asset
Excellent teamwork and time management skills selfdirection the ability to work under pressure and the desire to excel in a competitive environment
Travel Time:
0% 25%Pay Range:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay restricted stock units and quarterly bonus payments. In addition to these components our package includes health benefits that begin day one retirement savings plans and an industry leading IESPP program with a 6month look back feature. Find more information about all our benefits at the link below:Benefits of working at Microchip
The annual base salary range for this position is ..**Range is dependent on numerous factors including job location skills and experience.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
Required Experience:
Senior IC
Employment Type
Full-Time
