Principal Hardware Engineer
Principal Hardware Engineer
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$ 136500 - 253500
1 Vacancy
Job Description
At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is the leader in hardware emulationacceleration technologies and products. As a Physical Design Principal Hardware Engineer you will drive solutions for complex designs from synthesis to GDS through tapeout. You are knowledgeable about floorplan clock construction placement routing and signoff closure activities such as timing analysis physical verification and IR/EM. You have exceptional communication skills and can collaborate with partner RTL DFT and Architecture teams. As a principal engineer you will contribute to further developing our tools and flows to improve design quality and execution. This position is located in our US offices (San Jose CA or Raleigh NC).
Our emulationacceleration system platform is the most advanced industryleading configurable scalable system generation after generation used in labs and datacenters. At the heart of these systems are a multitude of interconnected highly complex highperformance computing (HPC) devices based on a proprietary Boolean processor architecture. This is a role in the core technology team.
Key Responsibilities:
The duties and responsibilities Principal Hardware Engineer include:
- Drive solutions in logic synthesis floorplan place and route (PNR) clock construction
- Provide continuous improvement to existing tools flows and methodologies
- Optimize power performance and area to meet design requirements
- Experience with advanced process nodes and technologies
- Collaborate closely with cross functional teams to ensure proper design execution
- Work with R&D teams to improve Cadences suite of tools
- Close designs adhering to timing power IR/EM and foundry specifications
Qualifications
- BS with a minimum of 7 years of experience OR MS with a minimum of 5 years of experience OR PhD with a minimum of 1 year of experience Experienced engineer in floorplan synthesis PnR clocks and signoff
- Successfully owned and driven blocks/SoCs to tapeout
- Comfortable in the latest advanced technology nodes
- Experience in at least one scripting language like PERL Python TCL or Shell is preferred
- Selfmotivated team player with strong problemsolving skills to collaborate with teams to deliver results
- Excellent written and verbal communication skills
- BS/MS with815 years of relevant handson experience in physical design
The annual salary range for California is $136500 to $253500. You may also be eligible to receive incentive compensation: bonus equity and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications skill level competencies and work location. Our benefits programs include: paid vacation and paid holidays 401(k) plan with employer match employee stock purchase plan a variety of medical dental and vision plan options and more.
Were doing work that matters. Help us solve what others cant.
Required Experience:
Staff IC
Employment Type
Full-Time
