STD cell layout engineer
STD cell layout engineer
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Job Description
Job Responsibilities:
Implement high quality Standard Cell layouts (basic combinational complex and customized cells) which meets designers and layout leads specifications while achieving project objectives and milestones
Requirements
Requirements:
Bachelor s degree in Electrical/Electronic/Computer Engineering or equivalent
At least 2 years experience in Standard Cell Library layout implementation
Proficient in understanding DRM of advanced CMOS technologies
Experienced in physical verification checks (DRC LVS ERC)
Strong knowledge in floorplanning and optimizing complex Standard Cells considering power performance area clock network critical paths and routability
Proficient in Synopsys/Cadence layout editor and physical verification tools
Knowledge in script programming (Tcl Perl or Cshell) for layout automation and inhouse rules creation is a plus
Effective team player with strong crossteam communication and time management skills
Employment Type
Full Time
