System on Chip (SoC) Verification Engineer (all genders)
System on Chip (SoC) Verification Engineer (all genders)
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Job Description
We bring chip design back to Europe!
For a technologically more independent Europe we aim to develop Fraunhofer IIS into a European IC Design Center for trusted and energyefficient highspeed ICs by 2026. As a leading competence center for digital chip design we deliver essential cuttingedge technologies in the areas of exascale highperformance computing and trusted electronics. In addition we offer sophisticated digital design services based on RISCV. Our target customers are design houses semiconductor manufacturers SMEs and system integrators. Potential applications are areas such as highspeed data processing blockchain or cybersecurity. Today our Integrated Digital Systems business unit develops digital circuits in CMOS technologies as System on Chip ASIC or IP.
As a SoC Verification Engineer you will play a key role in presilicon RTL verification of block and toplevel SoC designs utilizing RISCV architecture. Working closely with crossfunctional teams you will help shape a modern reusable verification environment using stateoftheart methodologies and metricdriven approaches.
Your key responsibilities:
- Understand the nuances of RISCV architectures and industrystandard lowpower architectures to build block/chip level testbenches using bestinclass verification methodologies
- Translate design specifications into comprehensive verification plans in collaboration with system architects
- Develop and maintain reusable testbenches for IP/blocklevel verification and support IP integration verification
- Create smart constraintrandom and directed test cases tailored to RISCV SoCs
- Build and analyze coverage models and refine tests to close coverage gaps
- Debug test failures manage bug tracking and ensure coverage closure
- Lead verification reviews to uphold coding quality and best practices in SoC verification
- Prepare run and evaluate regression runs
- University degree in (electrical) engineering IT/computer science or another related field
- Solid understanding of digital logic design and RISCVbased SoC architecture
- Proven experience with SystemVerilog and UVMbased verification environments
- Very good English and good German language skills
- Proactive and independent mindset
Nice to have:
- Familiarity with C / C programming assembly and objectoriented languages such as Python
- Knowledge of industrystandard interfaces and bus protocols (e.g. AXI)
- Experience with IP verification methods integration verification specific to RISCV and embedded CPU verification
- Interest in low power verification techniques and formal verification tools (e.g. JasperGold)
Fraunhofer is not only the largest organization for applied research in Europe but also a toprated employer. How so
- Our institute culture: We want our colleagues to feel comfortable. Therefore we constantly strive to ensure a friendly and supportive working atmosphere within our international team.
- Exciting activities: With customers and partners across the globe we provide an attractive working environment in a highly innovative key industry with exciting ventures and new experiences.
- Room for creativity: We want to give our colleagues a generous amount of creative freedom so that they can contribute and develop their own ideas.
- Personal development: With topoftherange company equipment and regular training we aim to provide the best possible working conditions and development opportunities for our colleagues.
- Flexible working hours: Due to our wide range of offers we make it easy for our colleagues to find a comfortable balance between their private and professional lives.
- Equal opportunity: Our female scientists for example can benefit from the career program Fraunhofer TALENTA.
More information about our employer offers on our website: position is initially limited to 2 years with the aim to extend it subsequently. The weekly working time is 39 hours. The position can also be filled on a parttime basis with a preference however to have it filled as close to a fulltime position as possible.
We value and promote the diversity of our employees skills and therefore welcome all applications regardless of age gender nationality ethnic and social origin religion ideology disability sexual orientation and identity. Appointment remuneration and social security benefits based on the publicsector collective wage agreement (TVD).
With its focus on developing key technologies that are vital for the future and enabling the commercial utilization of this work by business and industry Fraunhofer plays a central role in the innovation process. As a pioneer and catalyst for groundbreaking developments and scientific excellence Fraunhofer helps shape society now and in the future.
Intimidating Dont worry.
We are an interdisciplinary team looking to support young careeroriented talents. Hence do not hesitate to join Fraunhofer and send us your application!
Please submit it (cover letter CV and grade sheets) online!
Important: Please do not forget to click on the Apply button after Save. Otherwise your application will not reach us.
Questions about this position will be answered by Luca Prietz.
Required Experience:
Unclear Seniority
Employment Type
Part-Time
