drjobs Principal DFT Engineer

Principal DFT Engineer

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Job Location drjobs

Noida - India

Monthly Salary drjobs

Not Disclosed

drjobs

Salary Not Disclosed

Vacancy

1 Vacancy

Job Description

Job Summary: Seeking a Senior DFT Engineer with 10 years of experience adept in SOC DFT implementation.

Job responsibilities:

  • Develop and implement DFT strategies for advanced VLSI designs.
  • Collaborate with design and verification teams to ensure DFT requirements are met.
  • Perform scan insertion ATPG pattern generation and BIST (Memory and Logic) implementation.
  • Perform DFT simulations and analyze results to ensure test coverage and quality. Debug and resolve DFTrelated issues throughout the design process.
  • Stay updated on industry trends and advancements in DFT methodologies. Mentor junior engineers and provide technical guidance as needed.

Job qualification:

  • Senior DFT engineer with 10 years of experience in SoC DfT implementation and verification of scanarchitectures JTAG memory BIST ATPG LBIST.
  • The engineer should be well versed in Verilog/VHDL RTL coding experienced in using Mentor DfT tools and Cadence tools.
  • The engineer needs to have handson experience in scan insertion JTAG LBIST ATPG DRC and coverage analysis Simulation debug with timing/SDF.
  • Must have worked on one SoC at least from start to end.
  • Must be proactive collaborative and detailoriented capable of exercising independent judgment
  • Strong expertise in Post Silicon Readiness (Pattern Generation) and Silicon Debug.
  • The engineer with experience on debug and root cause the problem in simulation failures.
  • BE/ME/ from reputed institutes
  • Selfmotivation flexibility with strong interpersonal skills. Effective communication skills oral and written skills
  • Show an engaged curiosity a will to understand the mechanisms behind the effects an eagerness to constantly learn and improve


More information about NXP in India...

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Required Experience:

Staff IC

Employment Type

Full-Time

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