drjobs Spring 2023 System Design Validation Co-Op Intern 185946

Spring 2023 System Design Validation Co-Op Intern 185946

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1 Vacancy
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Job Location drjobs

San Jose, CA - USA

Monthly Salary drjobs

Not Disclosed

drjobs

Salary Not Disclosed

Vacancy

1 Vacancy

Job Description

What you do at AMD changes everything

We care deeply about transforming lives with AMD technology to enrich our industry our communities and the world. Our mission is to build great products that accelerate nextgeneration computing experiences the building blocks for the data center artificial intelligence PCs gaming and our mission is the AMD culture. We push the limitsof innovation to solve the worlds most important strive forexecution excellence while beingdirecthumblecollaborativeandinclusiveof diverse perspectives. This is who we are at our best. One Company. One Team.

AMD together we advance

AMD is looking for a passionate intern to assist our Platform Manager Controller/Configuration (PMC) Systems Design Validation Engineering team in proving and delivering device boot solutions on which customers can rely. The PMC is the primary device gateway/controller that configures and manages the programmable components in the device. The PMC function is at the heart of the nextgeneration Xilinx products at AMD. These Xilinx products are core components that enable a wide breadth of applications from AI/vision systems to data processing networks. AMD needs thoughtful innovative and thorough engineers who enjoy handson test development and debug. Prospective interns who are curious RTL/Ccoding tinkerers and who reap satisfaction from being part of a team that can deliver worldclass silicon SoC devices should apply.

Responsibilities include:

Work with the PMC architecture design verification and application teams to develop execute and debug validation tests. Validation tests are system level embedded (C code) processordriven digital logic (Verilog or VHDL) designs that involve integrated digital logic IP external component interfaces and internal control/data paths for validating design tools flows and silicon device functionality. Development flows include digital logic simulation and hardware .

Consult with internal applications teams regarding system validation test results and learnings for delivering quality documentation and design examples

Qualifications:

Currently enrolled at an accredited University pursing a undergrad or masters in computer engineering (or equivalent) degree program

Expected to start in January 2023

Duration is 39 months working fulltime 40 hours per week)

Must be able to work onsite at our San Jose Office 2100 Logic Dr San Jose CA 95124

Job Requirements:

Familiarity with a hardware digital logic design language (RTL) such as Verilog or VHDL

Familiarity with lab test equipment such as oscilloscopes or logic analyzers

Course work or practical experience with digital logic and state machines including digital logic timing fundamentals

Familiarity with embedded processing systems including course work or practical experience with C code and Linux commands

Familiarity with scripting languages such as Python and Tcl

Strong communication teamwork and problemsolving skills

Knowledge of the Xilinx Vivado design tools and SoC/FPGA devices are a plus

Knowledge of Xilinx device boot methods is a plus


Requisition Number:185946
Country:United StatesState:CaliforniaCity:San Jose
Job Function:Student/ Intern/ Temp

Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age ancestry color marital status medical condition mental or physical disability national origin race religion political and/or third party affiliation sex pregnancy sexual orientation gender identity military or veteran status. Please click here for more information.


Required Experience:

Intern

Employment Type

Intern

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