As a Silicon AI/ML DFT Engineer you will contribute to developing innovative silicon solutions powering nextgeneration AI/ML applications. Your responsibilities will involve defining and implementing advanced DFT strategies improving silicon quality and driving postsilicon testing processes.
Job Overview:
Key Responsibilities:
- Develop DFT strategies and architectures including hierarchical DFT/Memory BuiltIn Self Test (MBIST) IJTAG/TAP and HiSpeed IO.
- Insert DFT logic such as boundary scan scan chains DFT Compression Logic BuiltIn Self Test (BIST) Test Access Point (TAP) controllers Clock Control blocks and other DFT IP blocks.
- Integrate and validate MBIST logic test collars for memories MBIST controllers eFuse logic
- Document DFT architectures and test sequences including bootup procedures associated with test pins and TAP interfaces.
- Ensure all Test Design Rule Checks (TDRC) are completed and resolve any violations.
- Support postsilicon test activities including debug and validation with test engineers.
Minimum Qualifications:
- Bachelors degree in Electrical Engineering or a related field (or equivalent practical experience).
- 5 years of experience in DFT specification definition architecture and insertion.
- Proficiency in using EDA tools (e.g. Spyglass Tessent).
- Experience in ASIC DFT synthesis STA simulation and verification flows.
Preferred Qualifications:
- Masters degree in Electrical Engineering.
- Experience in IP integration (e.g. memories test controllers TAP and MBIST).
- Familiarity with SoC development cycles including silicon bringup and debug activities.
- Proficiency in fault modeling and working with ATE engineers for silicon validation and debugging.
- Expertise in reducing test costs and improving production quality.
About Eximietas Design:
At Eximietas Design we are dedicated to innovation driving the development of cuttingedge silicon solutions for AI/ML applications. Join us to be a part of this transformative journey contributing to projects that impact millions globally.
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