SOC Design Verification Engineer
SOC Design Verification Engineer
Employer Active
Job Alert
You will be updated with latest job alerts via email
Share
Job Alert
You will be updated with latest job alerts via email
Job Description
Job Title: SOC Design Verification Engineer
Location: Redmond WA / Santa Clara CA / San Jose CA
Position Type: Contract
Duration: 6 / 12 Month
Work Type: Onsite / Hybrid
Rate: Pay range offered to a successful candidate will be based on several factors including the candidates education work experience work location specific job duties certifications etc.
Job Description:
Minimum Qualifications
Track record of firstpass success in ASIC development cycles.
Bachelors degree in Computer Science Computer Engineering relevant technical field or equivalent practical experience.
8 to 10 years of handson experience in System Verilog/UVM methodology
Experience in one or more of the following areas along with functional verificationSV Assertions Formal Emulation.
Experience in EDA tools and scripting (Python TCL Perl Shell) used to build tools and flows for verification environments.
Preferred Qualifications
Experience verifying GPU/CPU designs.
Experience in development of UVM based verification environments from scratch.
Experience with Design verification of Datacenter applications like Video AI/ML and Networking designs.
Experience with revision control systems like Mercurial(Hg) Git or SVN.
Experience with IP or integration verification of highspeed interfaces like PCIe DDR Ethernet.
Experience working across and building relationships with crossfunctional design model and emulation teams.
Define and implement SoC verification plans build verification test benches to enable subsystem/SoC level verification.
Develop functional tests based on verification test plan.
Drive Design Verification to closure based on defined verification metrics on test plan functional and code coverage.
Debug rootcause and resolve functional failures in the design partnering with the Design team.
Collaborate with crossfunctional teams like Design Model Emulation and Silicon validation teams towards ensuring the highest design quality.
Develop and drive continuous Design Verification improvements using the latest verification methodologies tools and technologies from the industry.
Employment Type
Full Time
