Analog Layout Design Engineer

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We are hiring opening for the Analog Layout Design Engineer role. Please find the JD below

JOB Designation: Analog Layout Design Engineer

JOB Location: Bangalore Hyderabad India

Mode of Hiring: Full time FTE

Notice Period: Immediate to 60 days

Experience:5 years

Required Skills: Qualifications and Experience:

• Requires 5 years of experience in analog/mixedsignal layout design of deep submicron CMOS circuits
• Experience implementing analog layouts to achieve tight matching low noise and low power consumption. Layouts may include analog blocks resistors capacitors pad IOs ESD structures etc.
• High level of proficiency in custom and standard cellbased floorplanning and hierarchical layout assembly.
• Must understand techniques for managing IR drop RC delay electromigration selfheating and coupling capacitance.
• Must recognize failure prone circuit and layout structures have experience with analog and DFM best practices and proactively work with circuit designer to identify the best approach to solving problems.
• High level proficiency in interpretation of CALIBRE DRC ERC LVS etc. reports.
• Knowledge of MENTOR GRAPHICS or CADENCE layout tools.
• Scripting skills in PERL or SKILL is a plus but not required.
• Excellent communication skills and able to work with crossfunctional teams.

If anyone interested please send an updated CV to