Employer Active
Job Title : : FPGA SV/UVM Verification Engineer
Location : Remote
Job Type :: Fulltime
Job Description :
5+ Years of FPGA Requirement based Verification
Experience with System Verilog
Experience with Test Bench Creation, Test Bench Troubleshooting, Test Case development, Test Procedure Development and result analysis
Experience with UVM
DO-254 Process knowledge is desired
Video/Image Processing Project Experience
Full Time