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Job Details
Position : STA Engineer
Job Location : Bangalore
About the company:
One of the leading names in IT Software Company
Responsibilities:
Experience in Synthesis of complex SoCs block/ top level and writing timing constraints.
Experience in formal verification RTL to netlist – to- netlist with DFT constraints.
Experience in post-layout STA closure and timing ECOs.
Worked in technology nodes 45 nm and below.
Knowledge of low -power aware implementation is a plus.
Tools: Design compiler, RTL compiler, LEC, CLP, ETS/ PTSI/ GT.
Job Requirement
Primary Skills:
Able to handle Soc/Subsystem and blocklevel synthesis activities , Soc/Subsystem and blocklevel LEC, CLP and timing closure
Secondary Skills:
Able to handle PTPX and debug CTS issues to balance clocks
Full Time