Staff Engineer, CPU Core Verification

Tenstorrent is leading the industry on cutting-edge AI technology revolutionizing performance expectations ease of use and cost efficiency. With AI redefining the computing paradigm solutions must evolve to unify innovations in software models compilers platforms networking and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration curiosity and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

At Tenstorrent we build open state of the art compute for real workloads and real will own CPU corelevel verification shaping how our outoforder RISCV CPUs behave in silicon.

This role ishybrid based out of Bangalore India.

We welcome candidates at various experience levels for this role. During the interview process candidates will be assessed for the appropriate level and offers will align with that level which may differ from the one in this posting.

Who You Are

• You bring 8 years in CPU verification or closely related digital design.
• You know highperformance outoforder CPU microarchitecture in depth.
• You work comfortably with RTL waveforms logs and complex debug scenarios.
• You communicate clearly across design DV emulation and postsilicon teams.

What We Need

• Plan and drive functional verification for CPU core features and complex microarchitectural scenarios.
• Develop UVM assembly and C/C based stimulus functional models and coverage for ISA RISC-V extensions and un-core components.
• Debug simulation and emulation regressions using RTL understanding waveforms and logs to identify and resolve issues efficiently.
• Build and enhance coverage models testbenches and debug infrastructure to improve verification quality and coverage closure.
• Collaborate with design validation and test teams to support bring-up and delivery of robust CPU cores and clusters.

What You Will Learn

• How Tenstorrent designs and validates highperformance RISCV CPU cores and clusters.
• Techniques for spanning presilicon emulation and postsilicon verification with shared stimulus.
• Ways to scale coverage debug and infrastructure across multiple CPU programs.
• How open hardware and software fit into Tenstorrents broader compute roadmap.

Tenstorrent offers a highly competitive compensation package and benefits and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws including those codified in the U.S. Export Administration Regulations (EAR) the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1 E1 and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information systems or technologies subject to these laws the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws any offer of employment will be rescinded.