Lead DV Engineer
Posted:
24 May 2026 (30+ days ago)
Application Deadline:
21 August 2026
Vacancies:
1 Vacancy
Job Summary
Experience: 810 Years
Key Skills:
- SoC Design Verification (SoC DV)
Role Summary:
- Lead-level experience in SoC Design Verification
- Strong hands-on expertise in verification methodologies and DV flows
Required Skills:
PTF Pytest python networking software development ASIC C