DFT Engineer
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Monthly Salary:
Posted on:
3 hours ago
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1 Vacancy
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Job Summary
Job Title: DFT Engineer SCAN
Experience: 5 Years
Location: Chennai
We are looking for an experienced DFT Engineer with 5 years of experience in Scan DFT implementation and validation for complex SoC/ASIC designs. The ideal candidate should have strong hands-on expertise in Scan insertion Scan ATPG compression coverage analysis and pattern validation.
Key Responsibilities:- Work on DFT Scan implementation for SoC / ASIC designs
- Handle Scan insertion Scan stitching Scan compression and ATPG pattern generation
- Perform fault coverage analysis and improve test coverage
- Debug Scan / ATPG / pattern simulation issues
- Work closely with RTL PD STA and Validation teams for DFT closure
- Support pattern verification pattern bring-up and silicon debug activities
- Ensure DFT implementation meets quality and test requirements
- 5 years of experience in DFT Scan
- Strong hands-on experience in Scan insertion Scan stitching ATPG Scan compression
- Good knowledge of stuck-at transition fault and coverage analysis
- Experience in pattern simulation and debug
- Familiarity with DFT tools like Tessent / Modus / Synopsys DFT Compiler / TetraMAX
- Good understanding of ASIC/SoC design flow
- Ability to work with cross-functional teams for DFT closure
