Ingénieur principal en analogique Principal Engineer Analog Design

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Job Description:

Le groupe Timing and Communication (TCG) de Microchip recherche activement un ingénieur principal en conception analogique. Les responsabilités couvrent un large éventail dactivités telles que la conception la simulation et la validation de circuits intégrés analogiques (CI). Les produits sont généralement des conceptions SoC à signaux mixtes.

Léquipe analogique développe les blocs IP critiques utilisés dans les produits de synchronisation du TCG. Ces circuits comprennent des PLL multi-GHz des circuits numériques haute vitesse des pilotes MEMS ainsi que des pads dE/S à hautes performances et haute vitesse.

En tant quingénieur en conception analogique et membre de léquipe Analog IP vous serez amené à:

Travailler avec les responsables de conception analogique et les architectes afin de concevoir des blocs IP analogiques spécifiques.
Simuler des circuits analogiques dans différentes variantes de procédé et conditions de fonctionnement.
Développer des modèles de blocs de conception destinés à être intégrés dans des simulations mixtes analogiques/numériques au niveau système.
Effectuer la validation au niveau bloc des dispositifs issus du procédé silicium ainsi que lévaluation en laboratoire au niveau système.

The Timing and Communication Group (TCG) at Microchip has an open vacancy for principal analog design engineer.

The responsibility spans wide range of activities such as the design simulation and validation of analog integrated circuits (ICs). The products are usually mixed signal SOC designs.
The Analog team develops the critical IP blocks used in the TCG timing products. These circuits include multi-GHz PLL circuits high speed digital circuits MEMS drivers and high-speed performance IO pads.

As an Analog Design Engineer and a member of the Analog IP team you will:

Work with analog design leads and architects to design specific analog IP blocks.
Simulate analog circuits across process corners and operating conditions.
Develop models of design blocks for inclusion in top-level mixed-signal simulations.
Perform block-level validation of silicon process devices and system-level laboratory evaluation.

Requirements/Qualifications:

Exigences du poste

Maîtrise ou doctorat en génie électrique
Minimum de 5 ans dexpérience directe dans le domaine des circuits analogiques et mixtes analogiques/numériques
Expérience en conception de circuits analogiques et haute vitesse notamment dans les domaines suivants : ADC DAC filtres PLL DLL et interfaces dE/S haute vitesse
Solides connaissances fondamentales en théorie des circuits conception et layout
Expérience pratique en scripting et en automatisation à laide des langages Skill Python Perl et Tcl
Bonne maîtrise du flot de conception et des outils Cadence IC
Une expertise en conception système de circuits mixtes analogiques/numériques est un atout
Excellente connaissance de Verilog-A pour la modélisation comportementale et la simulation analogique
Bonnes aptitudes en communication et en travail déquipe ainsi quune expérience de collaboration avec des équipes multisites sont souhaitées

Masters degree or PhD in electrical engineering
Minimum 5 years of direct experience working on analog and mixed-signal circuits.
High-speed and analog circuit design experience including the following: ADCs DACs Filters PLLs DLLs and high-speed I/Os.
Strong fundamentals in circuit theory design and layout
Hands-on experience in scripting and automation using skill language python Perl and tcl
Strong knowledge in Cadence IC design flow and tools
Expertise in the system design of mixed signal circuits is preferred
Strong knowledgeable in Verilog-A for analog behavioral modeling and simulation
Good communication teamwork skills and experience working with multi-site teams are desirable

Travel Time:

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