Openchip And Software Technologies SL

Openchip is looking for a frontend engineer to help design and build the user interface layer of our AI platform a powerful developer platform for optimizing deploying and tracking AI systems. This is a greenfield opportunity to architect and implement a frontend that is far from typi

Openchip is looking for a frontend engineer to help design and build the user interface layer of our AI platform a powerful developer platform for optimizing deploying and tracking AI systems. This is a greenfield opportunity to architect and implement a frontend that is far from typi

The Role:As a Functional Verification Principal Engineer you will be interfacing with architecture de-sign physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high-level modelling UVM HW/SW Co-De

The Role:As a Functional Verification Principal Engineer you will be interfacing with architecture de-sign physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work will involve high-level modelling UVM HW/SW Co-De

Position overview:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of OpenChips novel hardware features and accelerators bringing visible improvements to end users.Job responsibilities:Make independent techn

Position overview:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of OpenChips novel hardware features and accelerators bringing visible improvements to end users.Job responsibilities:Make independent techn

The Role:We are seeking an experienced Engineering Manager to lead the design development and operation of our cutting-edge AI platform. This platform will be the foundation for training and deploying sophisticated AI systems with a particular focus on multi-agent architectures.This r

The Role:We are seeking an experienced Engineering Manager to lead the design development and operation of our cutting-edge AI platform. This platform will be the foundation for training and deploying sophisticated AI systems with a particular focus on multi-agent architectures.This r

The Role:As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulati

The Role:As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulati

We are looking for an outstanding individual with expertise in training large-scale AI models including Large Language Models (LLMs) or equivalent architectures. This person will play a key role in the development and optimization of AI workloads collaborating closely with hardware an

We are looking for an outstanding individual with expertise in training large-scale AI models including Large Language Models (LLMs) or equivalent architectures. This person will play a key role in the development and optimization of AI workloads collaborating closely with hardware an

The Role:As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulati

The Role:As a Functional Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulati

At OpenChip we are building the future of hardware. Our mission is to revolutionize semiconductor design through open-source principles collaboration and radical innovation. We develop high-performance Systems-on-Chip (SoCs) that power tomorrows technologies. Our team is made up of br

At OpenChip we are building the future of hardware. Our mission is to revolutionize semiconductor design through open-source principles collaboration and radical innovation. We develop high-performance Systems-on-Chip (SoCs) that power tomorrows technologies. Our team is made up of br

We are looking for a talented and ambitious Rust Backend Engineer to help design and build the core infrastructure for our cloud-based AI deployment this role you will develop the scalable high-performance backend services that power the deployment orchestration and serving of AI mod

We are looking for a talented and ambitious Rust Backend Engineer to help design and build the core infrastructure for our cloud-based AI deployment this role you will develop the scalable high-performance backend services that power the deployment orchestration and serving of AI mod

The Role:As a visionary and technically adept security professional you will champion Openchips cutting-edge silicon and software security technologies across global markets driving strategic customer engagements fostering long-term partnerships and securing design wins that embed our

The Role:As a visionary and technically adept security professional you will champion Openchips cutting-edge silicon and software security technologies across global markets driving strategic customer engagements fostering long-term partnerships and securing design wins that embed our

The Role:The candidate will design an ultra-low power MLP hardware accelerator for image inference in Verilog. He/She will evaluate PPA parameters and benchmark the design with similar architecture from literature. Building on Openchips existing MLP design the candidate will have the

The Role:The candidate will design an ultra-low power MLP hardware accelerator for image inference in Verilog. He/She will evaluate PPA parameters and benchmark the design with similar architecture from literature. Building on Openchips existing MLP design the candidate will have the

The Role:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of Openchips novel hardware features and accelerators bringing visible improvements to end users.Key responsibilities: Understand the technical lands

The Role:Develop low- (BIOS firmware device drivers) and mid-level software (emulation simulation and virtualization) to enable the use of Openchips novel hardware features and accelerators bringing visible improvements to end users.Key responsibilities: Understand the technical lands

The SoC Architecture team is responsible for defining high-performance and power efficient System-on-Chip hardware architecture.The team identifies Hardware Requirements defines the overall SoC system and delivers High-level Architecture Specification (HAS) integrating multiple proces

The SoC Architecture team is responsible for defining high-performance and power efficient System-on-Chip hardware architecture.The team identifies Hardware Requirements defines the overall SoC system and delivers High-level Architecture Specification (HAS) integrating multiple proces

The role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models.As a Senior Security Software Engineer you will lead a team designing and implementing security features across Opench

The role:Openchip is building new RISC-V chips with security at heart enabling safer and more privacy-respectful execution of data processing workloads like AI models.As a Senior Security Software Engineer you will lead a team designing and implementing security features across Opench

As a Staff Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Acceleratio

As a Staff Verification Engineer you will be interfacing with architecture design physical implementation and software teams in order to make sure that the systems are performing to the highest level. Your work may involve high-level modelling UVM HW/SW Co-Debug Simulation Acceleratio

The SoC Architecture team is responsible for defining high-performance and power efficient System-on-Chip hardware architecture.The team identifies Hardware Requirements defines the overall SoC system and delivers High-level Architecture Specification (HAS) integrating multiple proces

The SoC Architecture team is responsible for defining high-performance and power efficient System-on-Chip hardware architecture.The team identifies Hardware Requirements defines the overall SoC system and delivers High-level Architecture Specification (HAS) integrating multiple proces

About OpenchipOpenchip is a European Silicon Engineering Company headquartered in Barcelona Spain. We aim to democratize the usage of Chips by developing Systems on Chip SOCs that combines RISC-V and accelerated chiplets for AI and HPC everything interconnected with UCIe open interfac

About OpenchipOpenchip is a European Silicon Engineering Company headquartered in Barcelona Spain. We aim to democratize the usage of Chips by developing Systems on Chip SOCs that combines RISC-V and accelerated chiplets for AI and HPC everything interconnected with UCIe open interfac

The Role:Openchip is building exciting new RISC-V chips with HPC and AI acceleration. The Compilers team is developing the compilers both for traditional languages (C C Fortran) and for ML frameworks. Building on top of industry-standard compiler frameworks like LLVM your role is to d

The Role:Openchip is building exciting new RISC-V chips with HPC and AI acceleration. The Compilers team is developing the compilers both for traditional languages (C C Fortran) and for ML frameworks. Building on top of industry-standard compiler frameworks like LLVM your role is to d

We are actively seeking a Senior design Engineer to join our dynamic and growing digital design team.The Role:Responsibilities include but not limited to:to drive design execution of silicon design from definition through product launch and acts as primary point of contact for a IP de

We are actively seeking a Senior design Engineer to join our dynamic and growing digital design team.The Role:Responsibilities include but not limited to:to drive design execution of silicon design from definition through product launch and acts as primary point of contact for a IP de

The Role:As an AI Compiler Engineer you will be responsible for designing developing and optimizing the AI compiler toolchain that bridges high-level machine learning frameworks and Openchips AI hardware accelerators (RISC-V). You will work closely with software hardware and AI engine

The Role:As an AI Compiler Engineer you will be responsible for designing developing and optimizing the AI compiler toolchain that bridges high-level machine learning frameworks and Openchips AI hardware accelerators (RISC-V). You will work closely with software hardware and AI engine